component
ISL68124IRAZ-T
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RENESAS DC-DC Controllers, TQFN-40-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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ISL68124IRAZ-T
RENESAS · DC-DC Controllers · TQFN-40-EP(5x5)
ISL68124IRAZ-T from RENESAS, in a TQFN-40-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | PWM0 | output | Pulse width modulation output for phase 0 that connects to the PWM input of a 3.3V logic-compatible smart power stage, driver IC or power stage. |
| 2 | PWM1 | output | Pulse width modulation output for phase 1 that connects to the PWM input of a 3.3V logic-compatible smart power stage, driver IC or power stage. |
| 3 | PWM2 | output | Pulse width modulation output for phase 2 that connects to the PWM input of a 3.3V logic-compatible smart power stage, driver IC or power stage. |
| 4 | PWM3 | output | Pulse width modulation output for phase 3 that connects to the PWM input of a 3.3V logic-compatible smart power stage, driver IC or power stage. |
| 5 | GND | power_in | Ground pin that must be connected directly to the system GND plane. |
| 6 | DNC | unconnected | Do not connect any signal to this pin. |
| 7 | GND | power_in | Ground pin that must be connected directly to the system GND plane. |
| 8 | DNC | unconnected | Do not connect any signal to this pin. |
| 9 | DNC | unconnected | Do not connect any signal to this pin. |
| 10 | DNC | unconnected | Do not connect any signal to this pin. |
| 11 | EN0 | input | Active-high enable control input for Output 0; connect to ground if not used. |
| 12 | EN1 | input | Active-high enable control input for Output 1; connect to ground if not used. |
| 13 | TWARN | output | Open-drain thermal warning flag that is pulled low on a sensed over-temperature at the TMON pins without disabling the outputs; maximum pull-up voltage is VCC. |
| 14 | PG0 | output | Open-drain power-good indicator for Output 0 with maximum pull-up voltage of VCC. |
| 15 | PG1 | output | Open-drain power-good indicator for Output 1 with maximum pull-up voltage of VCC. |
| 16 | SCL | bidirectional | SMBus serial clock pin with maximum pull-up voltage of VCC; tie to ground when not used. |
| 17 | SDA | bidirectional | SMBus serial data pin with maximum pull-up voltage of VCC; tie to ground when not used. |
| 18 | SALRT | output | SMBus serial alert pin with maximum pull-up voltage of VCC; tie to ground when not used. |
| 19 | CONFIG | input | Configuration ID selection pin; the datasheet refers to its Table 3 for the selection values, which are not in the provided text. |
| 20 | VINSEN | input | Input voltage sense pin that connects to VIN through a resistor divider (typically 40.2k/10k) with a 10nF decoupling capacitor. |
| 21 | VSEN1 | input | Positive differential voltage sense input for Output 1 that connects to the positive remote sensing point; connect to ground if not used. |
| 22 | RGND1 | input | Negative differential voltage sense input for Output 1 that connects to the negative remote sensing point; connect to ground if not used. |
| 23 | CSRTN3 | input | Current sense return input of the phase 3 differential amplifier; unused phases should have their current sense inputs grounded. |
| 24 | CS3 | input | Current sense input of the phase 3 differential amplifier; unused phases should have their current sense inputs grounded. |
| 25 | CSRTN2 | input | Current sense return input of the phase 2 differential amplifier; unused phases should have their current sense inputs grounded. |
| 26 | CS2 | input | Current sense input of the phase 2 differential amplifier; unused phases should have their current sense inputs grounded. |
| 27 | CSRTN1 | input | Current sense return input of the phase 1 differential amplifier; unused phases should have their current sense inputs grounded. |
| 28 | CS1 | input | Current sense input of the phase 1 differential amplifier; unused phases should have their current sense inputs grounded. |
| 29 | CSRTN0 | input | Current sense return input of the phase 0 differential amplifier; unused phases should have their current sense inputs grounded. |
| 30 | CS0 | input | Current sense input of the phase 0 differential amplifier; unused phases should have their current sense inputs grounded. |
| 31 | RGND0 | input | Negative differential voltage sense input for Output 0 that connects to the negative remote sensing point; connect to ground if not used. |
| 32 | VSEN0 | input | Positive differential voltage sense input for Output 0 that connects to the positive remote sensing point; connect to ground if not used. |
| 33 | TMON0 | input | External temperature measurement input for Output 0 supporting diode-based sensing and smart power stage sensing; tie to ground when not used. |
| 34 | TMON1 | input | External temperature measurement input for Output 1 supporting diode-based sensing and smart power stage sensing; tie to ground when not used. |
| 35 | VCC | power_in | Chip primary bias input that connects directly to a +3.3V supply with a high quality MLCC bypass capacitor (at least 2.2µF placed at the pin). |
| 36 | VCCS | power_out | Internally generated 1.2V LDO logic supply derived from VCC that must be decoupled with 4.7µF or greater MLCC (X5R or better). |
| 37 | SA | input | PMBus address selection pin whose resistor value sets the slave address per the datasheet's Table 2, which is not in the provided text. |
| 38 | DNC | unconnected | Do not connect any signal to this pin. |
| 39 | DNC | unconnected | Do not connect any signal to this pin. |
| 40 | DNC | unconnected | Do not connect any signal to this pin. |
| 41 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | TQFN-40-EP(5x5) |
| Category | Power Management ICs |
| Pins | 41 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage VCC | VCC | 4.3 | V | 9 | |||
| Supply Voltage VCCS | VCCS | 1.6 | V | 9 | |||
| All Other Pins Voltage | -0.3 | V | Printed as (GND - 0.3V) to VCC + 0.3V; min is GND - 0.3 V, upper limit is VCC + 0.3 V (not numeric) | 9 | |||
| Maximum Junction Temperature | 150 | °C | 9 | ||||
| Maximum Storage Temperature Range | -65 | 150 | °C | 9 | |||
| ESD Human Body Model | 2 | kV | Tested per JS-001-2014 | 9 | |||
| ESD Charged Device Model | 1 | kV | Tested per JS-001-2014 | 9 | |||
| Latch-Up | 100 | mA | Tested per JESD-78D; Class 2, Level A | 9 | |||
| Ambient Temperature | -40 | 85 | °C | 9 | |||
| Output Voltage | 0 | 3.05 | V | 9 | |||
| Supply Voltage VCC tolerance | VCC | -5 | 5 | % | Printed as +3.3V ±5% | 9 | |
| Nominal Supply Current | 63 | mA | VCC = 3.3VDC; EN1/2 = VIH, fSW = 400kHz | 9 | |||
| Shutdown Supply Current | 11.5 | mA | VCC = 3.3VDC; EN1/2 = 0V, no switching | 9 | |||
| VCCS LDO Output Voltage | VCCS | 1.2 | 1.25 | 1.3 | V | 9 | |
| VCCS Maximum Current Capability | 50 | mA | Excluding internal load | 9 | |||
| VCC Rising POR Threshold | 2.7 | 2.9 | V | 9 | |||
| VCC Falling POR Threshold | 1 | V | 9 | ||||
| Enable (EN0 and EN1) Input High Level | VIH | 2.55 | V | 9 | |||
| Enable (EN0 and EN1) Input Low Level | VIL | 0.8 | V | 9 | |||
| POR to Initialization Complete Time | 30 | 40 | ms | 9 | |||
| Output Voltage Adjustment Range | 0.25 | 3.05 | V | 9 | |||
| Output Voltage Set-Point Accuracy | -0.5 | 0.5 | % | Set-point 0.8V to 3.05V | 9 | ||
| Output Voltage Set-Point Accuracy (low range) | -5 | 5 | mV | Set-point 0.25V to <0.8V | 9 | ||
| Maximum Common-Mode Input (VSEN/RGND) | 0.2 | V | Printed as VCC - 0.2 V; value is the 0.2 V offset below VCC | 9 | |||
| Maximum Differential Input (VSEN - RGND) | 3.05 | V | 9 | ||||
| Maximum Common-Mode Input (SPS mode) | 1.6 | V | CSRTNx - GND | 9 | |||
| Maximum Common-Mode Input (DCR mode) | 3.3 | V | CSRTNx - GND | 9 | |||
| Current Sense Accuracy | -2 | 2 | % | ISEN to ADC accuracy | 9 | ||
| Overvoltage Protection Threshold When Disabled | 0.2 | V | Printed as VCC - 0.2 V; value is the 0.2 V offset below VCC | 9 | |||
| Accuracy of Switching Frequency Setting (500 kHz) | 480 | 500 | 520 | kHz | When set to 500kHz | 10 | |
| Accuracy of Switching Frequency Setting | -4 | 4 | % | 10 | |||
| Switching Frequency Range | 200 | 1000 | kHz | 10 | |||
| Soft-Start Ramp Rate Accuracy | -4 | 4 | % | 10 | |||
| Transition Rate Accuracy | -4 | 4 | % | 10 | |||
| PWMx Output High Level | 0.4 | V | IOUT = 4mA; printed as VCC - 0.4 V (0.4 V offset below VCC) | 10 | |||
| PWMx Output Low Level | 0.4 | V | IOUT = 4mA | 10 | |||
| PWMx Output Tri-State IOL | 1 | µA | VOH = VCC | 10 | |||
| PWMx Output Tri-State IOH | -1 | µA | VOL = 0V | 10 | |||
| Temperature Sensor Range | -50 | 150 | °C | 10 | |||
| Temperature Sensor Accuracy | -4.5 | 4.5 | % | TMON to ADC accuracy | 10 | ||
| TWARN Output Low Impedance | 13 | 49 | Ω | 10 | |||
| PG Output Low Voltage | 0.4 | V | IOUT = 8mA load | 10 | |||
| PG Leakage Current | 0.5 | 1 | µA | With pull-up resistor externally connected to VCC | 10 | ||
| Input Voltage Accuracy | -2.5 | 2.5 | % | VINSEN to ADC accuracy | 10 | ||
| SALERT, SDA Output Low Level | 0.4 | V | IOUT = 4mA | 10 | |||
| SCL, SDA Input High Level | 1.55 | V | 10 | ||||
| SCL, SDA Input Low Level | 0.8 | V | 10 | ||||
| SCL Frequency Range | 0.05 | 2 | MHz | 10 | |||
| Thermal Resistance Junction-to-Ambient (θJA) | θJA | 30 | °C/W | 40 Ld 5x5 QFN package | 9 | ||
| Thermal Resistance Junction-to-Case (θJC) | θJC | 1.2 | °C/W | 40 Ld 5x5 QFN package | 9 | ||
| Supply Voltage VCC | VCC | 3.3 | V | 9 |
CAD (KiCad official)
- Symbol:
ISL68124IRAZ-T - Footprint:
Package_DFN_QFN:QFN-40-1EP_5x5mm_P0.4mm_EP3.6x3.6mm - 3D model: TQFN-40-EP(5x5) (KiCad packages3D, STEP)
- 3D model files:
isl68124iraz-t-etched.step/isl68124iraz-t-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);isl68124iraz-t.step/isl68124iraz-t.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: RENESAS datasheet (46 pp, sha256
147ee94926bc5afa, retrieved 2026-10-30, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).