# ISL33002IUZ

**Intersil(Renesas Electronics)** · Signal Buffers, Repeaters, Splitters · MSOP-8

ISL33002IUZ from Intersil(Renesas Electronics), in a MSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC2 | power_in | VCC2 power supply, +2.3V to +5.5V, decoupled to ground with a 0.01µF to 0.1µF capacitor; SDA_OUT and SCL_OUT logic thresholds are referenced to VCC2 and their pull-ups connect to VCC2. |
| 2 | SCL_OUT | bidirectional | Clock I/O pin on the VCC2 side of the buffer, with logic thresholds referenced to VCC2. |
| 3 | SCL_IN | bidirectional | Clock I/O pin on the VCC1 side of the buffer. |
| 4 | GND | power_in | Device ground pin. |
| 5 | ACC | input | Rise time accelerator enable pin: logic 0 disables the accelerator, logic 1 enables it, with the logic threshold referenced to VCC1. |
| 6 | SDA_IN | bidirectional | Data I/O pin on the VCC1 side of the buffer. |
| 7 | SDA_OUT | bidirectional | Data I/O pin on the VCC2 side of the buffer, with logic thresholds referenced to VCC2. |
| 8 | VCC1 | power_in | VCC1 power supply, +2.3V to +5.5V, decoupled to ground with a 0.01µF to 0.1µF capacitor. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Intersil(Renesas Electronics) |
| Package | MSOP-8 |
| Category | Interface ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC1 Supply Range | VCC1 | 2.3 |  | 5.5 | V | Full | 4 |
| VCC2 Supply Range | VCC2 | 2.3 |  | 5.5 | V | ISL33002 and ISL33003; Full | 4 |
| Supply Current from VCC1 | ICC1 |  | 2 | 3 | mA | VCC1 = VCC2 = 5.5V; ISL33002 and ISL33003 (Note 11); Full | 4 |
| Supply Current from VCC2 | ICC2 |  | 0.22 | 0.6 | mA | VCC2 = VCC1 = 5.5V; ISL33002 and ISL33003 (Note 11); Full | 4 |
| Precharge Circuitry Voltage | VPRE | 0.8 | 1 | 1.2 | V | SDA and SCL pins floating; Full | 4 |
| Bus Idle Time | tIDLE | 50 | 83 | 150 | µs | Figure 4, Note 12; Full | 4 |
| Accelerator Pin Enable Threshold | VACC_EN |  | 0.5 | 0.7 | xVCC1 | ISL33002 only; +25°C | 5 |
| Accelerator Pin Disable Threshold | VACC_DIS | 0.3 | 0.5 |  | xVCC1 | ISL33002 only; +25°C | 5 |
| Accelerator Pin Input Current | IACC | -1 | 0.1 | 1 | µA | ISL33002 only; +25°C | 5 |
| Input Low Threshold | VIL |  |  | 0.3 | xVCC1 | VCC1 = VCC2, 10kΩ to VCC1 on SDA and SCL pins; +25°C | 5 |
| Input-Output Offset Voltage | VOS | 0 | 50 | 150 | mV | VCC1 = 3.3V, 10kΩ to VCC1 on SDA and SCL pins, VINPUT = 0.2V; VCC2 = 3.3V (Figure 5); Full | 5 |
| Output Low Voltage | VOL |  |  | 0.4 | V | VCC1 = 2.7V, VINPUT = 0V, ISINK = 3mA on SDA/SCL pins; VCC2 = 2.7V (Figure 6); Full | 5 |
| Input Leakage Current | ILEAK | -5 | 0.1 | 5 | µA | SDA and SCL pins = VCC1 = 5.5V; VCC2 = 5.5V; Full | 5 |
| SCL/SDA Propagation Delay High-to-Low | tPHL | 0 | 27 | 100 | ns | CLOAD = 100pF, 2.7kΩ to VCC1 on SDA and SCL pins, VCC1 = 3.3V; VCC2 = 3.3V (Figure 7); +25°C | 5 |
| SCL/SDA Propagation Delay Low-to-High | tPLH | 0 | 2 | 26 | ns | CLOAD = 100pF, 2.7kΩ to VCC1 on SDA and SCL pins, VCC1 = 3.3V; VCC2 = 3.3V (Figure 7); +25°C | 5 |
| ESD Class 3 HBM |  | 6 |  |  | kV | Class 3 HBM ESD (JESD22-A114); +25°C | 5 |
| Transient Accelerator Current | ITRAN_ACC |  | 5 |  | mA | VCC1 = 2.7V, VCC2 = 2.7V; ACC = 0.7*VCC1 (Figure 8); +25°C | 5 |
| Accelerator Delay, On-Off | tPDOFF |  | 10 |  | ns | ISL33002 only (Note 10); +25°C | 5 |
| Buffer SDA and SCL Pins Input Capacitance | CIN |  | 10 |  | pF | Figure 25; +25°C | 5 |
| ESD HBM, SDA/SCL pins |  |  | 12 |  | kV | Human Body Model, SDA and SCL pins to ground only (JESD22-A114); +25°C | 5 |
| ESD Machine Model, All Pins |  |  | 400 |  | V | JESD22-A115; +25°C | 5 |
| Supply Voltage Range (VCC1, VCC2) | VCC | 2.3 |  | 5.5 | V | VCC1 and VCC2 Supply Voltage Range | 4 |
| Operating Temperature Range | TA | -40 |  | 85 | °C |  | 4 |
| Supply Voltage Absolute Maximum | VCC1, VCC2 | -0.3 |  | 7 | V | Referenced to GND | 4 |
| SDA/SCL Pin Voltage Absolute Maximum |  | -0.3 |  | 7 | V | SDA_IN, SCL_IN, SDA_OUT, SCL_OUT, READY | 4 |
| ACC Pin Voltage Absolute Maximum |  | -0.3 |  |  | V | EN, ACC: -0.3V to +(VCC1 + 0.3)V | 4 |
| Maximum Sink Current (SDA and SCL Pins) |  |  |  | 20 | mA |  | 4 |
| Maximum Storage Temperature Range |  | -65 |  | 150 | °C |  | 4 |
| Maximum Junction Temperature | TJ |  |  | 150 | °C |  | 4 |
| Thermal Resistance Junction to Ambient, 8 Ld MSOP | θJA |  | 151 |  | °C/W | 8 Ld MSOP Package (Notes 4, 7) | 4 |
| Thermal Resistance Junction to Case, 8 Ld MSOP | θJC |  | 50 |  | °C/W | 8 Ld MSOP Package (Notes 4, 7) | 4 |

## CAD (KiCad official)

- Symbol: `ISL33002IUZ`
- Footprint: `Package_SO:MSOP-8_3x3mm_P0.65mm`
- 3D model: MSOP-8 (KiCad packages3D, STEP)
- 3D model files: `isl33002iuz-etched.step` / `isl33002iuz-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `isl33002iuz.step` / `isl33002iuz.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Intersil(Renesas Electronics) datasheet](docs/isl33002iuz-datasheet.pdf) (18 pp, sha256 `83a3259f84d7009a`, retrieved 2026-10-31, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/isl33002iuz-datasheet.pdf)