ISL32435EIBZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	RO	output	Receiver output: if A-B ≥ -10mV then RO is high, and if A-B ≤ -200mV then RO is low; RO is high if A and B are floating, shorted, or on an undriven terminated bus.
2	RE	input	Receiver output enable: RO is enabled when RE is low and is high impedance when RE is high; RE is internally pulled low.
3	DE	input	Driver output enable: the driver outputs Y and Z are enabled when DE is high and are high impedance when DE is low; DE is internally pulled high.
4	DI	input	Driver input: a low on DI forces output Y low and output Z high, while a high on DI forces Y high and Z low.
5	GND	power_in	Ground connection.
6	A/Y	bidirectional	±40V fault protected and ±15kV ESD protected RS-485/RS-422 I/O pin that is the non-inverting receiver input and non-inverting driver output when INV is low; it is an input when DE = 0 and an output when DE = 1.
7	B/Z	bidirectional	±40V fault protected and ±15kV ESD protected RS-485/RS-422 I/O pin that is the inverting receiver input and inverting driver output when INV is low; it is an input when DE = 0 and an output when DE = 1.
8	VCC	power_in	System power supply input, 3V to 5.5V.

Key specifications

Parameter	Value
Manufacturer	RENESAS
Package	SOIC-8
Category	Interface ICs
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Thermal resistance junction to ambient, 8 Ld SOIC	JA		108		°C/W	Thermal Resistance (Typical), 8 Ld SOIC Package (Notes 6, 7)	6
Thermal resistance junction to case, 8 Ld SOIC	JC		47		°C/W	Thermal Resistance (Typical), 8 Ld SOIC Package (Notes 6, 7)	6
Supply voltage to ground	VCC			7	V		6
Input voltages DI, DE, RE		-0.3			V	Upper limit printed as VCC + 0.3V	6
Bus pin input/output voltage A/Y, B/Z, A, B, Y, Z		-50		50	V		6
Bus pin transient pulse voltage A/Y, B/Z, A, B, Y, Z		-60		60	V	Transient pulse through 100Ω, Note 5	6
Maximum junction temperature				150	°C	Plastic package	6
Maximum storage temperature range		-65		150	°C		6
Supply voltage VCC (recommended)	VCC	3		5.5	V	Printed as 3.3V or 5V; wide supply range 3V to 5.5V	6
Temperature range		-40		85	°C		6
Bus pin common-mode voltage range	VCM	-15		15	V		6
Driver differential VOUT (loaded, RS-422)	VOD2	2			V	RL = 100Ω (RS-422), VCC ≥ 4.5V	6
Driver differential VOUT (loaded, RS-485)	VOD2	1.7	2.3		V	RL = 54Ω (RS-485) VCC ≥ 4.5V	6
Driver differential VOUT (loaded, RS-485, 3.3V)	VOD2	1.35	1.42		V	VCC = 3.3V	6
Driver differential VOUT (loaded, RS-485, 3V)	VOD2	1.1	1.3		V	VCC ≥ 3V	6
Change in magnitude of driver differential VOUT	VOD			0.2	V	RL = 54Ω or 100Ω (Figure 6A)	6
Driver differential VOUT with common-mode load	VOD3	1.5			V	RL = 60Ω, -15V ≤ VCM ≤ 15V, VCC ≥ 4.5V	6
Driver common-mode VOUT	VOC	-1		3	V	RL = 54Ω or 100Ω	6
Change in magnitude of driver common-mode VOUT	VOC			0.2	V	RL = 54Ω or 100Ω (Figure 6A)	6
Driver short-circuit current	IOSD	-250		250	mA	DE = VCC, -15V ≤ VO ≤ 15V (Note 10)	6
Driver short-circuit current at first foldback	IOSD1	-83		83	mA	At first foldback, 24V ≤ VO ≤ -24V	6
Driver short-circuit current at second foldback	IOSD2	-13		13	mA	At second foldback, 35V ≤ VO ≤ -35V	6
Logic input high voltage	VIH	2.35			V	DE, DI, RE, INV (See Figure 28)	6
Logic input low voltage	VIL			0.8	V	DE, DI, RE, INV	6
Logic input current DI	IIN1	-1		1	µA	DI	6
Logic input current DE, RE, INV	IIN1	-15	6	15	µA	DE, RE, INV	6
Input/output current A/Y, B/Z at VIN = 12V	IIN2			250	µA	DE = 0V, VCC = 0V or 3.6V or 5.5V, VIN = 12V	7
Input/output current A/Y, B/Z at VIN = -7V	IIN2	-200			µA	DE = 0V, VCC = 0V or 3.6V or 5.5V, VIN = -7V	7
Input/output current A/Y, B/Z at VIN = ±15V	IIN2	-800		850	µA	DE = 0V, VCC = 0V or 3.6V or 5.5V, VIN = ±15V	7
Input/output current A/Y, B/Z at VIN = ±40V	IIN2	-6		6	mA	DE = 0V, VCC = 0V or 3.6V or 5.5V, VIN = ±40V, (Note 17)	7
Receiver differential threshold voltage, VCC ≤ 3.6V	VTH	-200	-120	-10	mV	-15V ≤ VCM ≤ 15V, VCC ≤ 3.6V	7
Receiver differential threshold voltage, VCC ≥ 4.5V	VTH	-250	-180	-10	mV	-15V ≤ VCM ≤ 15V, VCC ≥ 4.5V	7
Receiver input hysteresis	VTH	25		30	mV	-15V ≤ VCM ≤ 15V	7
Receiver output high voltage, IO = -4mA	VOH1	2.4			V	VID = -10mV IO = -4mA, VCC ≥ 3V	7
Receiver output high voltage, IO = -8mA	VOH2	2.4			V	IO = -8mA, VCC ≥ 4.5V	7
Receiver output low voltage, IO = 4mA	VOL			0.4	V	IO = 4mA, VCC ≥ 3V, VID = -200mV	7
Receiver output low voltage, IO = 5mA	VOL			0.4	V	IO = 5mA, VCC ≥ 4.5V, VID = -250mV	7
Receiver short-circuit current	IOSR	-115		115	mA	0V ≤ VO ≤ VCC	7
Three-state receiver output current	IOZR	-1	0.01	1	µA	0V ≤ VO ≤ VCC	7
No-load supply current	ICC		2.1	4.5	mA	DE = VCC, RE = 0V or VCC, DI = 0V or VCC	7
Shutdown supply current	ISHDN		10	35	µA	DE = 0V, RE = VCC, DI = 0V or VCC	7
ESD HBM RS-485 pins, half duplex			16.5		kV	Human Body Model, from Bus Pins to GND, Half Duplex	7
Driver differential output delay (1Mbps)	tPLH, tPHL		70	200	ns	RD = 54Ω, CD = 50pF (Figure 7)	8
Driver differential output skew (1Mbps)	tSKEW		4	25	ns	RD = 54Ω, CD = 50pF (Figure 7)	8
Driver differential rise or fall time (1Mbps)	tR, tF	50	130	300	ns	RD = 54Ω, CD = 50pF (Figure 7)	8
Maximum data rate (driver, 1Mbps)	fMAX	1			Mbps	CD = 820pF (Figure 9)	8
Driver enable to output high (1Mbps)	tZH			300	ns	SW = GND (Figure 8), (Note 11)	8
Driver enable to output low (1Mbps)	tZL			300	ns	SW = VCC (Figure 8), (Note 11)	8
Driver disable from output low (1Mbps)	tLZ			300	ns	SW = VCC (Figure 8)	8
Driver disable from output high (1Mbps)	tHZ			300	ns	SW = GND (Figure 8)	8
Time to shutdown (1Mbps driver)	tSHDN	60	160	600	ns	(Note 13)	8
Driver enable from shutdown to output high (1Mbps)	tZH(SHDN)			3000	ns	SW = GND (Figure 8), (Notes 13, 14)	8
Driver enable from shutdown to output low (1Mbps)	tZL(SHDN)			3000	ns	SW = VCC (Figure 8), (Notes 13, 14)	8
Maximum data rate (receiver, 1Mbps)	fMAX	1			Mbps	(Figure 10)	8
Receiver input to output delay (1Mbps)	tPLH, tPHL		115	200	ns	(Figure 10)	8
Receiver skew (1Mbps)	tSKD		4	20	ns	(Figure 10)	8
Receiver enable to output low (1Mbps)	tZL			80	ns	RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11), (Note 12)	9
Receiver enable to output high (1Mbps)	tZH			80	ns	RL = 1kΩ, CL = 15pF, SW = GND (Figure 11), (Note 12)	9
Receiver disable from output low (1Mbps)	tLZ			80	ns	RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11)	9
Receiver disable from output high (1Mbps)	tHZ			80	ns	RL = 1kΩ, CL = 15pF, SW = GND (Figure 11)	9
Time to shutdown (1Mbps receiver)	tSHDN	60	160	600	ns	(Note 13)	9
Receiver enable from shutdown to output high (1Mbps)	tZH(SHDN)			2500	ns	RL = 1kΩ, CL = 15pF, SW = GND (Figure 11), (Notes 13, 15)	9
Receiver enable from shutdown to output low (1Mbps)	tZL(SHDN)			2500	ns	RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11), (Notes 13, 15)	9

CAD (KiCad official)

Symbol: ISL32435EIBZ
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: isl32435eibz-etched.step / isl32435eibz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); isl32435eibz.step / isl32435eibz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: RENESAS datasheet (22 pp, sha256 ab62031afb18c9f7, retrieved 2026-11-02, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

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ISL32435EIBZ

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