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Ray Publish 0.1.0 b800b45 10d ago

ISL32432EIBZ

RENESAS · Pre-ordered Chips · SOIC-8

ISL32432EIBZ from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 RO output Receiver output: RO is high if A-B is at or above -10mV and low if A-B is at or below -200mV, and RO is held high when the inputs are floating, shorted, or on a terminated undriven bus.
2 RE input Receiver output enable: RO is enabled when RE is low and is high impedance when RE is high, with an internal pulldown to low.
3 DE input Driver output enable: the driver outputs are enabled when DE is high and are high impedance when DE is low, with an internal pullup to high.
4 DI input Driver input: a low on DI forces output Y low and Z high, while a high on DI forces Y high and Z low.
5 GND power_in Ground connection.
6 A/Y bidirectional ±40V fault protected and ±15kV ESD protected RS-485/RS-422 non-inverting receiver input and driver output; it is an input when DE = 0 and an output when DE = 1.
7 B/Z bidirectional ±40V fault protected and ±15kV ESD protected RS-485/RS-422 inverting receiver input and driver output; it is an input when DE = 0 and an output when DE = 1.
8 VCC power_in System power supply input, 3V to 5.5V.

Key specifications

Parameter Value
Manufacturer RENESAS
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Driver Differential VOUT (Loaded, RS-422 RL=100Ω) VOD2 2 3 V RL = 100Ω (RS-422), VCC ≥ 4.5V 6
Driver Differential VOUT (Loaded, RS-485 RL=54Ω) VOD2 1.7 2.3 V RL = 54Ω (RS-485) VCC ≥ 4.5V 6
Driver Differential VOUT (Loaded, RL=54Ω) VOD2 1.35 1.42 V VCC = 3.3V 6
Driver Differential VOUT (Loaded, RL=54Ω) VOD2 1.1 1.3 V VCC ≥ 3V 6
Change in Magnitude of Driver Differential VOUT for Complementary Output States VOD 0.2 V RL = 54Ω or 100Ω (Figure 6A) 6
Driver Differential VOUT with Common-Mode Load VOD3 1.5 V RL = 60Ω, -15V ≤ VCM ≤ 15V, VCC ≥ 4.5V 6
Driver Common-Mode VOUT VOC -1 3 V RL = 54Ω or 100Ω 6
Change in Magnitude of Driver Common-Mode VOUT for Complementary Output States VOC 0.2 V RL = 54Ω or 100Ω (Figure 6A) 6
Driver Short-Circuit Current IOSD -250 250 mA DE = VCC, -15V ≤ VO ≤ 15V (Note 10) 6
Driver Short-Circuit Current at first foldback IOSD1 -83 83 mA At first foldback, 24V ≤ VO ≤ -24V 6
Driver Short-Circuit Current at second foldback IOSD2 -13 13 mA At second foldback, 35V ≤ VO ≤ -35V 6
Logic Input High Voltage VIH 2.35 V DE, DI, RE, INV (See Figure 28) 6
Logic Input Low Voltage VIL 0.8 V DE, DI, RE, INV 6
Logic Input Current IIN1 -1 1 µA DI 6
Logic Input Current IIN1 -15 6 15 µA 6
Input/Output Current (A/Y, B/Z) IIN2 250 µA DE = 0V, VCC = 0V or 3.6V or 5.5V, VIN = 12V 7
Input/Output Current (A/Y, B/Z) IIN2 -200 µA DE = 0V, VCC = 0V or 3.6V or 5.5V, VIN = -7V 7
Input/Output Current (A/Y, B/Z) IIN2 -800 850 µA DE = 0V, VCC = 0V or 3.6V or 5.5V, VIN = ±15V 7
Input/Output Current (A/Y, B/Z) IIN2 -6 6 mA DE = 0V, VCC = 0V or 3.6V or 5.5V, VIN = ±40V (Note 17) 7
Receiver Differential Threshold Voltage VTH -200 -120 -10 mV -15V ≤ VCM ≤ 15V, VCC ≤ 3.6V 7
Receiver Differential Threshold Voltage VTH -250 -180 -10 mV -15V ≤ VCM ≤ 15V, VCC ≥ 4.5V 7
Receiver Input Hysteresis VTH 25 30 mV -15V ≤ VCM ≤ 15V 7
Receiver Output High Voltage VOH1 2.4 V VID = -10mV IO = -4mA, VCC ≥ 3V 7
Receiver Output Low Voltage VOL 0.4 V IO = 4mA, VCC ≥ 3V, VID = -200mV 7
Three-State (High Impedance) Receiver Output Current IOZR -1 0.01 1 µA 0V ≤ VO ≤ VCC (Note 18) 7
Receiver Short-Circuit Current IOSR -115 115 mA 0V ≤ VO ≤ VCC 7
ESD Human Body Model, RS-485 pins (A, B, Y, Z, A/Y, B/Z) from bus pins to GND -16.5 16.5 kV Human Body Model, from Bus Pins to GND, Half Duplex 7
Driver Differential Output Delay tPLH, tPHL 280 1000 ns RD = 54Ω, CD = 50pF (Figure 7) 7
Driver Differential Output Skew tSKEW 4 100 ns RD = 54Ω, CD = 50pF (Figure 7) 7
Driver Differential Rise or Fall Time tR, tF 250 650 1500 ns RD = 54Ω, CD = 50pF (Figure 7) 7
Maximum Data Rate (driver, 250kbps version) fMAX 250 kbps CD = 820pF (Figure 9) 7
Driver Enable to Output High tZH 1600 ns SW = GND (Figure 8), (Note 11) 7
Driver Enable to Output Low tZL 1600 ns SW = VCC (Figure 8), (Note 11) 7
Time to Shutdown (driver table) tSHDN 60 160 600 ns (Notes 13, 18) 8
Driver Enable from Shutdown to Output High tZH(SHDN) 3000 ns SW = GND (Figure 8), (Notes 13, 14, 18) 8
Driver Enable from Shutdown to Output Low tZL(SHDN) 3000 ns SW = VCC (Figure 8), (Notes 13, 14, 18) 8
Maximum Data Rate (receiver, 250kbps version) fMAX 250 kbps (Figure 10) 8
Receiver Input to Output Delay tPLH, tPHL 240 325 ns (Figure 10) 8
Receiver Skew tSKD 6 25 ns (Figure 10) 8
Receiver Enable to Output Low tZL 80 ns RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11), (Notes 12, 18) 8
Receiver Enable to Output High tZH 80 ns RL = 1kΩ, CL = 15pF, SW = GND (Figure 11), (Notes 12, 18) 8
Receiver Enable from Shutdown to Output High tZH(SHDN) 2500 ns RL = 1kΩ, CL = 15pF, SW = GND (Figure 11), (Notes 13, 15, 18) 8
Receiver Enable from Shutdown to Output Low tZL(SHDN) 2500 ns RL = 1kΩ, CL = 15pF, SW = VCC (Figure 11), (Notes 13, 15, 18) 8
No-Load Supply Current ICC 2.1 4.5 mA DE = VCC, RE = 0V or VCC, DI = 0V or VCC 7
Shutdown Supply Current ISHDN 10 35 µA DE = 0V, RE = VCC, DI = 0V or VCC (Note 18) 7
VCC to Ground VCC 7 V 6
Input Voltages DI, DE, RE, INV -0.3 V 6
Input/Output Voltages A/Y, B/Z, A, B, Y, Z -50 50 V 6
Transient Input/Output Voltage A/Y, B/Z, A, B, Y, Z -60 60 V Transient pulse through 100Ω (Note 5) 6
RO Output Voltage -0.3 V 6
Latch-Up 125 °C per JESD78, Level 2, Class A 6
Maximum Junction Temperature (Plastic Package) 150 °C 6
Maximum Storage Temperature Range -65 150 °C 6
Supply Voltage (VCC) VCC 3 5.5 V 6
Temperature Range -40 85 °C 6
Bus Pin Common-Mode Voltage Range -15 15 V 6
Thermal Resistance Junction-to-Ambient, 8 Ld SOIC JA 108 °C/W 8 Ld SOIC Package (Notes 6, 7) 6
Thermal Resistance Junction-to-Case, 8 Ld SOIC JC 47 °C/W 8 Ld SOIC Package (Notes 6, 7) 6

CAD (KiCad official)

  • Symbol: ISL32432EIBZ
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: isl32432eibz-etched.step / isl32432eibz-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); isl32432eibz.step / isl32432eibz.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (22 pp, sha256 ab62031afb18c9f7, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF