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IS25LP032D-JBLA3-TR

Public Made by Adom

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ISSI(Integrated Silicon Solution) NOR FLASH, SOIC-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Datasheet

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Contents

README

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IS25LP032D-JBLA3-TR

ISSI(Integrated Silicon Solution) · NOR FLASH · SOIC-8-208mil

IS25LP032D-JBLA3-TR from ISSI(Integrated Silicon Solution), in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CE# input Chip Enable: when high the device is deselected with outputs high-impedance and in standby, and when pulled low the device is selected; CE# must transition from high to low after power-up before a new instruction is accepted.
2 SO (IO1) bidirectional Serial Data Output in standard SPI (data read on the falling edge of SCK), and bidirectional IO1 in Dual and Quad SPI and QPI modes.
3 WP# (IO2) bidirectional Write Protect that protects the Status Register (SRWD, QE, BP3-BP0) when SRWD=1 and WP# is low, and serves as IO2 in Quad mode; the WP# function is not available when QE=1.
4 GND power_in Ground: connect to ground when referenced to Vcc.
5 SI (IO0) bidirectional Serial Data Input in standard SPI (sampled on the rising edge of SCK), and bidirectional IO0 in Dual and Quad SPI and QPI modes.
6 SCK input Serial Data Clock: synchronized clock for input and output timing operations.
7 HOLD# or RESET# (IO3) bidirectional With QE=0 acts as HOLD# (default, P7=0) or RESET# (P7=1) selected by the P7 bit of the Read Register, and becomes IO3 when QE=1; HOLD# is active low and pauses serial communication while the device is selected.
8 Vcc power_in Device core power supply, 2.30V to 3.60V for IS25LP and 1.65V to 1.95V for IS25WP.

Key specifications

Parameter Value
Manufacturer ISSI(Integrated Silicon Solution)
Package SOIC-8-208mil
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Supply Voltage VCC 2.3 3 3.6 V IS25LP 99
Operating Temperature, Automotive Grade A3 -40 125 °C Automotive Grade A3 99
Storage Temperature -65 150 °C 99
VCC Supply Voltage Absolute Maximum VCC -0.5 6 V IS25LP 99
ESD Voltage (HBM) -2000 2000 V Human Body Model, ANSI/ESDA/JEDEC JS-001 99
Active Read Current ICC1 4 12 mA NORD at 50MHz 100
Active Read Current ICC1 6 14 mA FRD Single at 133MHz 100
Active Read Current ICC1 8 15 mA FRD Dual at 133MHz 100
Active Read Current ICC1 10 17 mA FRD Quad at 133MHz 100
Active Read Current ICC1 9 16 mA FRD Quad at 104MHz 100
Program Current ICC2 25 mA CE# = VCC, 125°C 100
WRSR Current ICC3 25 mA CE# = VCC, 125°C 100
Erase Current (SER/BER32/BER64) ICC4 25 mA CE# = VCC, 125°C 100
Erase Current (CE) ICC5 25 mA CE# = VCC, 125°C 100
Standby Current CMOS ISB1 45 µA CE# = VCC, VIN = GND or VCC, 125°C 100
Deep Power Down Current ISB2 25 µA IS25LP, CE# = VCC, VIN = GND or VCC, 125°C 100
Input Leakage Current ILI -1 1 µA VIN = 0V to VCC 100
Output Leakage Current ILO -1 1 µA VIN = 0V to VCC 100
Input Low Voltage Minimum VIL -0.5 V 100
Output Low Voltage VOL 0.2 V IOL = 100 µA 100
Input Capacitance (CE#, SCK) CIN 6 pF VIN = 0V, TA = 25°C, VCC=3V, 1MHz, IS25LP 101
Input/Output Capacitance (other pins) CIN/OUT 8 pF VIN/OUT = 0V, TA = 25°C, VCC=3V, 1MHz, IS25LP 101
Clock Frequency fCT 0 133 MHz except for fast read Quad I/O, QPI, DTR and read (03h) 102
Clock Frequency, fast read Quad I/O and QPI fCT 0 133 MHz IS25LP 102
Clock Frequency, fast read DTR fCT 0 66 MHz SPI DTR, Dual DTR, Dual I/O DTR, Quad I/O DTR, and QPI DTR 102
Clock Frequency for read (03h) fC 0 50 MHz 102
CE# High Time tCEH 7 ns 102
CE# Active Setup Time tCS 5 ns 102
CE# Active Hold Time tCH 5 ns 102
CE# Not Active Hold Time tCHSL 2.7 ns 102
CE# Not Active Setup Time tSHCH 2.7 ns 102
Data In Setup Time tDS 2 ns STR 102
Data In Setup Time tDS 1.5 ns DTR 102
Data in Hold Time tDH 2 ns STR 102
Data in Hold Time tDH 1.5 ns DTR 102
Output Valid tV 7 ns @ 133MHz (CL = 15pF) 102
Output Valid tV 8 ns @ 104MHz (CL = 30pF) 102
Output Hold Time tOH 2 ns 102
Output Disable Time tDIS 8 ns 102
Sector Erase Time (4Kbyte) tEC 70 300 ms 102
Block Erase Time (32Kbyte) tEC 0.1 0.5 s 102
Block Erase Time (64Kbyte) tEC 0.15 1 s 102
Chip Erase Time (32Mb) tEC 8 24 s 102
Page Program Time tPP 0.2 0.8 ms 102
Write Status Register time tW 2 15 ms 103
Vcc(min) to CE# Low tVCE 300 us 107
Byte Program Time 8 40 µs 108
Endurance 100000 Cycles JEDEC Standard A117 108
Data Retention 20 Years JEDEC Standard A117 108
Latch-Up -100 100 mA JEDEC Standard 78 108

CAD (KiCad official)

  • Symbol: IS25LP032D-JBLA3-TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: is25lp032d-jbla3-tr-etched.step / is25lp032d-jbla3-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); is25lp032d-jbla3-tr.step / is25lp032d-jbla3-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ISSI(Integrated Silicon Solution) datasheet (119 pp, sha256 53ef94f9f600a605, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF