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IS25LP016D-JNLE-TR
Public Made by Adomby adom
ISSI Integrated Silicon Solution NOR FLASH, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownIS25LP016D-JNLE-TR
ISSI Integrated Silicon Solution · NOR FLASH · SOIC-8
IS25LP016D-JNLE-TR from ISSI Integrated Silicon Solution, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | CE# | input | Chip Enable (active-low): deselects device and puts outputs in high-Z when high; selects device and brings it out of standby when low; CE# must transition high-to-low after power-up before a new instruction is accepted. |
| 2 | SO (IO1) | bidirectional | Serial Data Output / IO1: unidirectional output in standard SPI (data/status shifted out on falling SCK edge); becomes bidirectional IO1 in Dual I/O, Quad I/O, and QPI modes. |
| 3 | WP# (IO2) | bidirectional | Write Protect / IO2: when SRWD=1 and WP# is low, Status Register bits are write-protected; WP# function is disabled and pin becomes IO2 when QE bit is set to 1. |
| 4 | GND | power_in | Ground: connect to ground when referenced to VCC. |
| 5 | SI (IO0) | bidirectional | Serial Data Input / IO0: unidirectional input in standard SPI for instructions, addresses, and data latched on rising SCK edge; becomes bidirectional IO0 in Dual I/O, Quad I/O, and QPI modes. |
| 6 | SCK | input | Serial Data Clock: synchronized clock for all serial input and output timing operations; supports SPI modes 0 and 3; maximum frequency 133 MHz (STR) or 66 MHz (DTR). |
| 7 | HOLD# or RESET# (IO3) | bidirectional | HOLD# or RESET# / IO3: when QE=0 acts as HOLD# (P7=0, default) or RESET# (P7=1) per Read Register; HOLD# pauses serial communication without resetting the sequence; RESET# drives hardware reset when pulled low for minimum 100 ns; becomes IO3 when QE=1 or in QPI mode. |
| 8 | VCC | power_in | Power Supply: IS25LP016D operates from 2.30 V (min) to 3.60 V (max), 3.0 V typical; active read current 4 mA (typ), standby current 8 µA (typ at 85 °C). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | ISSI Integrated Silicon Solution |
| Package | SOIC-8 |
| Category | Memory |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
IS25LP016D-JNLE-TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
is25lp016d-jnle-tr-etched.step/is25lp016d-jnle-tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);is25lp016d-jnle-tr.step/is25lp016d-jnle-tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: ISSI Integrated Silicon Solution datasheet (115 pp, sha256
b7472bc6861b38f4, retrieved 2026-09-22, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.2, primaryclaude-haiku-4-5-20251001(text), consensusclaude-sonnet-4-6(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).