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IS25LP016D-JNLA3

Public Made by Adom

by adom

ISSI(Integrated Silicon Solution) Pre-ordered Chips, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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IS25LP016D-JNLA3

ISSI(Integrated Silicon Solution) · Pre-ordered Chips · SOIC-8

IS25LP016D-JNLA3 from ISSI(Integrated Silicon Solution), in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CE# input Chip Enable: when high the device is deselected with outputs in high impedance and in low-power standby, and when pulled low the device is selected; CE# must transition high to low after power-up before a new instruction is accepted.
2 SO (IO1) bidirectional Serial Data Output in standard SPI (data read on the falling edge of SCK), becoming bidirectional IO1 in Dual and Quad SPI modes.
3 WP# (IO2) bidirectional Write Protect protects the Status Register (SRWD, QE, BP3-BP0) when SRWD=1 and WP# is low, and becomes IO2 (WP# function unavailable) when the QE bit is set to 1.
4 GND power_in Ground: connect to ground when referenced to Vcc.
5 SI (IO0) bidirectional Serial Data Input in standard SPI (instructions, addresses and data latched on the rising edge of SCK), becoming bidirectional IO0 in Dual and Quad SPI modes.
6 SCK input Serial Data Clock: synchronized clock for input and output timing operations.
7 HOLD#/RESET# (IO3) bidirectional Acts as HOLD# (P7=0, default) or RESET# (P7=1) when QE=0, and becomes IO3 when the QE bit is set to 1; HOLD# is active low and pauses serial communication without resetting the sequence.
8 Vcc power_in Device core power supply, 2.30V to 3.60V for IS25LP016D.

Key specifications

Parameter Value
Manufacturer ISSI(Integrated Silicon Solution)
Package SOIC-8
Category Interface ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC Power Supply (IS25LP) VCC 2.3 3 3.6 V IS25LP 93
Ambient Operating Temperature, Automotive Grade A3 TA -40 125 °C Automotive Grade A3 93
Storage Temperature -65 150 °C 93
VCC Supply Voltage (IS25LP) VCC -0.5 6 V IS25LP 93
ESD Voltage (Human Body Model) -2000 2000 V ANSI/ESDA/JEDEC JS-001 93
Input Leakage Current ILI -1 1 µA VIN = 0V to VCC 94
Output Leakage Current ILO -1 1 µA VIN = 0V to VCC 94
Input Low Voltage (min) VIL -0.5 V 94
Output Low Voltage VOL 0.2 V IOL = 100 µA 94
VCC Active Read current ICC1 4 12 mA NORD at 50MHz 94
VCC Active Read current ICC1 6 14 mA FRD Single at 133MHz 94
VCC Active Read current ICC1 8 15 mA FRD Dual at 133MHz 94
VCC Active Read current ICC1 10 17 mA FRD Quad at 133MHz 94
VCC Active Read current ICC1 9 16 mA FRD Quad at 104MHz 94
VCC Program Current ICC2 22 25 mA CE# = VCC, 85°C 94
VCC Program Current ICC2 25 mA CE# = VCC, 125°C 94
VCC WRSR Current ICC3 22 25 mA CE# = VCC, 85°C 94
VCC Erase Current (SER/BER32/BER64) ICC4 22 25 mA CE# = VCC, 85°C 94
VCC Erase Current (CE) ICC5 22 25 mA CE# = VCC, 85°C 94
VCC Standby Current CMOS ISB1 8 15 µA CE# = VCC, VIN = GND or VCC, 85°C 94
VCC Standby Current CMOS ISB1 20 µA CE# = VCC, VIN = GND or VCC, 105°C 94
VCC Standby Current CMOS ISB1 30 µA CE# = VCC, VIN = GND or VCC, 125°C 94
Deep power down current IS25LP ISB2 6 10 µA CE# = VCC, VIN = GND or VCC, 85°C 94
Deep power down current IS25LP ISB2 15 µA CE# = VCC, VIN = GND or VCC, 105°C 94
Deep power down current IS25LP ISB2 20 µA CE# = VCC, VIN = GND or VCC, 125°C 94
Input Capacitance (CE#, SCK) CIN 6 pF VIN = 0V, TA = 25°C, VCC = 3V, 1MHz, IS25LP 95
Input/Output Capacitance (other pins) CIN/OUT 8 pF VIN/OUT = 0V, TA = 25°C, VCC = 3V, 1MHz, IS25LP 95
Clock Frequency (except fast read Quad I/O, QPI, DTR and read 03h) fCT 0 133 MHz 96
Clock Frequency for fast read Quad I/O and QPI fCT 0 133 MHz IS25LP 96
Clock Frequency for fast read DTR fCT 0 66 MHz SPI DTR, Dual DTR, Dual I/O DTR, Quad I/O DTR, QPI DTR 96
Clock Frequency for read (03h) fC 0 50 MHz 96
CE# High Time tCEH 7 ns 96
CE# Setup Time tCS 5 ns 96
CE# Hold Time tCH 5 ns 96
CE# Not Active Hold Time tCHSL 2.7 ns 96
CE# Not Active Setup Time tSHCH 2.7 ns 96
Data In Setup Time tDS 2 ns STR 96
Data In Setup Time tDS 1.5 ns DTR 96
Data in Hold Time tDH 2 ns STR 96
Data in Hold Time tDH 1.5 ns DTR 96
Output Valid tV 7 ns @ 133MHz (CL = 15pF) 96
Output Valid tV 8 ns @ 104MHz (CL = 30pF) 96
Output Hold Time tOH 2 ns 96
Output Disable Time tDIS 8 ns 96
HOLD to Output Low Z tLZ 12 ns 96
HOLD to Output High Z tHZ 12 ns 96
Sector Erase Time (4Kbyte) tEC 70 300 ms 96
Block Erase Time (32Kbyte) tEC 0.1 0.5 s 96
Block Erase Time (64Kbyte) tEC 0.15 1 s 96
Page Program Time tPP 0.2 0.8 ms 96
Write Status Register time tW 2 15 ms 97
Vcc(min) to CE# Low tVCE 300 us 101
Endurance 100000 Cycles JEDEC Standard A117 102
Data Retention 20 Years JEDEC Standard A117 102
Latch-Up -100 100 mA JEDEC Standard 78 102

CAD (KiCad official)

  • Symbol: IS25LP016D-JNLA3
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: is25lp016d-jnla3-etched.step / is25lp016d-jnla3-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); is25lp016d-jnla3.step / is25lp016d-jnla3.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ISSI(Integrated Silicon Solution) datasheet (115 pp, sha256 b7472bc6861b38f4, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF