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IS25LP016D-JBLE-TR

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ISSI Integrated Silicon Solution NOR FLASH, SOIC-8-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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IS25LP016D-JBLE-TR

ISSI Integrated Silicon Solution · NOR FLASH · SOIC-8-208mil

IS25LP016D-JBLE-TR from ISSI Integrated Silicon Solution, in a SOIC-8-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CE# input Chip Enable: high deselects the device and puts outputs in high impedance, low selects it, and CE# must go high-to-low once after power-up before an instruction is accepted.
2 SO (IO1) bidirectional Serial Data Output in standard SPI, read on the falling edge of SCK; becomes bidirectional IO1 in Dual and Quad SPI and QPI modes.
3 WP# (IO2) bidirectional Write Protect input that, with SRWD set to 1, write-protects the Status Register when pulled low; becomes IO2 in Quad I/O and QPI modes, where the WP# function is unavailable if QE=1.
4 GND power_in Ground: connect to ground when referenced to Vcc.
5 SI (IO0) bidirectional Serial Data Input in standard SPI, latched on the rising edge of SCK; becomes bidirectional IO0 in Dual and Quad SPI and QPI modes.
6 SCK input Serial Data Clock: synchronizes input and output timing; the device supports SPI modes 0 (0,0) and 3 (1,1).
7 HOLD# or RESET# (IO3) bidirectional HOLD# (active low, default when P7=0) pauses serial communication with SO high-impedance while CE# is low; RESET# (when P7=1) is an active-low hardware reset that puts output in High-Z; it becomes IO3 when QE=1.
8 Vcc power_in Device core power supply; 2.30V to 3.60V for the IS25LP016D.

Key specifications

Parameter Value
Manufacturer ISSI Integrated Silicon Solution
Package SOIC-8-208mil
Category Memory
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Storage Temperature -65 150 °C 93
VCC Supply Voltage (IS25LP) VCC -0.5 6 V IS25LP 93
Input Voltage with Respect to Ground on All Pins -0.5 V 93
All Output Voltage with Respect to Ground -0.5 V 93
Electrostatic Discharge Voltage (Human Body Model) -2000 2000 V ANSI/ESDA/JEDEC JS-001 93
Ambient Operating Temperature -40 105 °C Extended grade E 93
VCC Power Supply (IS25LP) VCC 2.3 3 3.6 V IS25LP 93
VCC Active Read current ICC1 4 12 mA NORD at 50MHz 94
VCC Active Read current ICC1 6 14 mA FRD Single at 133MHz 94
VCC Active Read current ICC1 8 15 mA FRD Dual at 133MHz 94
VCC Active Read current ICC1 10 17 mA FRD Quad at 133MHz 94
VCC Active Read current ICC1 9 16 mA FRD Quad at 104MHz 94
VCC Program Current ICC2 22 25 mA CE# = VCC, 85°C 94
VCC Program Current ICC2 25 mA CE# = VCC, 105°C 94
VCC WRSR Current ICC3 22 25 mA CE# = VCC, 85°C 94
VCC WRSR Current ICC3 25 mA CE# = VCC, 105°C 94
VCC Erase Current (SER/BER32/BER64) ICC4 22 25 mA CE# = VCC, 85°C 94
VCC Erase Current (SER/BER32/BER64) ICC4 25 mA CE# = VCC, 105°C 94
VCC Erase Current (CE) ICC5 22 25 mA CE# = VCC, 85°C 94
VCC Erase Current (CE) ICC5 25 mA CE# = VCC, 105°C 94
VCC Standby Current CMOS ISB1 8 15 µA CE# = VCC, VIN = GND or VCC, 85°C 94
VCC Standby Current CMOS ISB1 20 µA CE# = VCC, VIN = GND or VCC, 105°C 94
Deep Power Down Current (IS25LP) ISB2 6 10 µA IS25LP, CE# = VCC, VIN = GND or VCC, 85°C 94
Deep Power Down Current (IS25LP) ISB2 15 µA IS25LP, CE# = VCC, VIN = GND or VCC, 105°C 94
Input Leakage Current ILI -1 1 µA VIN = 0V to VCC 94
Output Leakage Current ILO -1 1 µA VIN = 0V to VCC 94
Input Low Voltage VIL -0.5 V 94
Output Low Voltage VOL 0.2 V IOL = 100 µA 94
Clock Frequency except for fast read Quad I/O, QPI, DTR and read (03h) fCT 0 133 MHz 96
Clock Frequency for fast read Quad I/O and QPI (IS25LP) fCT 0 133 MHz IS25LP 96
Clock Frequency for fast read DTR fCT 0 66 MHz SPI DTR, Dual DTR, Dual I/O DTR, Quad I/O DTR, and QPI DTR 96
Clock Frequency for read (03h) fC 0 50 MHz Read (03h) 96
CE# High Time tCEH 7 ns 96
CE# Setup Time tCS 5 ns 96
CE# Hold Time tCH 5 ns 96
CE# Not Active Hold Time tCHSL 2.7 ns 96
CE# Not Active Setup Time tSHCH 2.7 ns 96
Data In Setup Time tDS 2 ns STR 96
Data In Setup Time tDS 1.5 ns DTR 96
Data In Hold Time tDH 2 ns STR 96
Data In Hold Time tDH 1.5 ns DTR 96
Output Valid tV 7 ns @133MHz (CL = 15pF) 96
Output Valid tV 8 ns @104MHz (CL = 30pF) 96
Output Hold Time tOH 2 ns 96
Output Disable Time tDIS 8 ns 96
Sector Erase Time (4Kbyte) tEC 70 300 ms 96
Block Erase Time (32Kbyte) 0.1 0.5 s 96
Block Erase Time (64Kbyte) 0.15 1 s 96
Page Program Time tPP 0.2 0.8 ms 96
Suspend to read ready tSUS 100 µs 97
Resume to next suspend TRS 80 µs 97
Input Capacitance (CE#, SCK) CIN 6 pF VIN = 0V, IS25LP 95
Input/Output Capacitance (other pins) CIN/OUT 8 pF VIN/OUT = 0V, IS25LP 95
Endurance 100000 Cycles JEDEC Standard A117 102
Data Retention 20 Years JEDEC Standard A117 102

CAD (KiCad official)

  • Symbol: IS25LP016D-JBLE-TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8-208mil (KiCad packages3D, STEP)
  • 3D model files: is25lp016d-jble-tr-etched.step / is25lp016d-jble-tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); is25lp016d-jble-tr.step / is25lp016d-jble-tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: ISSI Integrated Silicon Solution datasheet (115 pp, sha256 267caa186cd63058, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF