main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers is1870sf-202: viewers · Ray 4d ago
is1870sf-202-etched.glb Publish 0.1.0 · Ray 4d ago
is1870sf-202-etched.step is1870sf-202: factory component page (tier=mfr) · Ray 4d ago
is1870sf-202-hero.glb is1870sf-202: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
is1870sf-202-hero.overlay.json Publish 0.1.0 · Ray 4d ago
is1870sf-202.glb Publish 0.1.0 · Ray 4d ago
is1870sf-202.kicad_mod Publish 0.1.0 · Ray 4d ago
is1870sf-202.kicad_sym Publish 0.1.0 · Ray 4d ago
is1870sf-202.lbr Publish 0.1.0 · Ray 4d ago
is1870sf-202.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier mfr, 49 pins · Ray 4d ago

IS1870SF-202

MICROCHIP · Global Sourcing Parts · QFN-48(6x6)

IS1870SF-202 from MICROCHIP, in a QFN-48(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 P1_0 bidirectional GPIO P1_0, also ADC input AD8 and TX_CLS1 class 1 RF Tx control.
2 P1_1 bidirectional GPIO P1_1, also ADC input AD9 and second SPI bus MISO2 (Central mode).
3 P1_2 bidirectional GPIO P1_2, also ADC input AD10 and I2C SCL.
4 P1_3 bidirectional GPIO P1_3, also ADC input AD11 and I2C SDA.
5 P1_4 bidirectional GPIO P1_4, also ADC input AD12 and event counter input.
6 P1_5 bidirectional GPIO P1_5, also ADC input AD13 and event counter input.
7 P1_7 bidirectional GPIO P1_7, also external 32.768 kHz crystal output XO32K.
8 P1_6 bidirectional GPIO P1_6, also external 32.768 kHz crystal input XI32K.
9 HCI_TXD output HCI UART transmit data output.
10 HCI_RXD input HCI UART receive data input.
11 P3_0 bidirectional GPIO P3_0.
12 P3_1 bidirectional GPIO P3_1, also SPI bus NCS and SPI Flash CSN.
13 P3_2 bidirectional GPIO P3_2, also SPI bus MISO and SPI Flash SDO.
14 P3_3 bidirectional GPIO P3_3, also SPI bus MOSI and SPI Flash SDI.
15 P3_4 bidirectional GPIO P3_4, also SPI bus SCLK and SPI Flash SCK.
16 P3_5 bidirectional GPIO P3_5, also LED1 output.
17 P3_6 bidirectional GPIO P3_6, also UART flow-control RTS and PWM0 output.
18 RST_N input External reset input.
19 P0_0 bidirectional GPIO P0_0, also ADC input AD0 and UART flow-control CTS.
20 P0_1 bidirectional GPIO P0_1, also ADC input AD1.
21 P0_2 bidirectional GPIO P0_2, also ADC input AD2 and LED0 output.
22 P0_3 bidirectional GPIO P0_3, also ADC input AD3.
23 P0_4 bidirectional GPIO P0_4, also ADC input AD4.
24 P0_5 bidirectional GPIO P0_5, also ADC input AD5.
25 P0_6 bidirectional GPIO P0_6, also ADC input AD6.
26 P0_7 bidirectional GPIO P0_7, also ADC input AD7.
27 BK_O power_out 1.55V buck regulator output; for internal use, do not connect to external devices.
28 BK_LX power_out 1.55V buck regulator switching node output; for internal use, do not connect to external devices.
29 BK_IN power_in Buck converter input; voltage range 1.9V to 3.6V.
30 VBAT power_in Battery input, voltage range 1.9V to 3.6V; connect to BK_IN and a 10 µF decoupling capacitor.
31 AVDD power_in Input supply for the LDOs CLDO, PALDO and RFLDO.
32 CLDO_O power_out 1.2V CLDO output for core-logic and memories supply; connect to 1 µF X5R/X7R capacitor.
33 ULPC_O power_out 1.2V programmable ULPC output for always-on logic and retention memory; for internal use, do not connect to external devices.
34 VREF power_out PMU band-gap reference voltage output for LDOs and buck; for internal use, do not connect to external devices.
35 XO_N passive Negative input of the 32 MHz crystal.
36 XO_P passive Positive input of the 32 MHz crystal.
37 VCC_RF power_in Power input for VCO and RF (1.28V); connect to 1 µF X5R/X7R capacitor.
38 Rx input RF receive path.
39 Tx output RF transmit path.
40 VCC_PA power_in Power supply for the power amplifier (1.55V); connect to 0.22 µF X5R/X7R capacitor.
41 P2_0 bidirectional Mode configuration pin: H selects application mode, L selects test mode.
42 P2_1 bidirectional GPIO P2_1, also PWM0 output.
43 P2_2 bidirectional GPIO P2_2, also PWM1 output.
44 P2_3 bidirectional GPIO P2_3, also PWM2 output.
45 P2_4 bidirectional GPIO P2_4, also TX_CLS1 class 1 RF Rx control.
46 P2_5 bidirectional GPIO P2_5, also ADC input AD15 and PWM3 output.
47 P2_6 bidirectional GPIO P2_6.
48 P2_7 bidirectional GPIO P2_7, also ADC input AD14 and SPI bus NCS2 for the second SPI bus (Central mode).
49 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer MICROCHIP
Package QFN-48(6x6)
Category Global Sourcing Parts
Pins 49

CAD (KiCad official)

  • Symbol: IS1870SF-202
  • Footprint: Package_DFN_QFN:QFN-48-1EP_6x6mm_P0.4mm_EP4.2x4.2mm
  • 3D model: QFN-48(6x6) (KiCad packages3D, STEP)
  • 3D model files: is1870sf-202-etched.step / is1870sf-202-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); is1870sf-202.step / is1870sf-202.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: MICROCHIP datasheet (42 pp, sha256 06362905836aefbf, retrieved 2026-11-02, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF