component
IRS44262SPBF
Public Made by Adomby adom
Infineon Technologies Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 9d ago |
| viewers | 9d ago |
| irs44262spbf-etched.glb | 9d ago |
| irs44262spbf-etched.step | 9d ago |
| irs44262spbf-hero.glb | 9d ago |
| irs44262spbf-hero.overlay.json | 9d ago |
| irs44262spbf.glb | 9d ago |
| irs44262spbf.kicad_mod | 9d ago |
| irs44262spbf.kicad_sym | 9d ago |
| irs44262spbf.lbr | 9d ago |
| irs44262spbf.step | 9d ago |
| package.json | 9d ago |
| page.json | 9d ago |
| README.md | 9d ago |
| verification.json | 9d ago |
IRS44262SPBF
Infineon Technologies · Gate Drive ICs · SOIC-8
IRS44262SPBF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection. |
| 2 | INA | input | Logic input for gate driver output OUTA, out of phase (CMOS Schmitt-triggered, 3.3V and 5V logic compatible; logic 1 below 0.8 V gives OUTA high, logic 0 above 2.5 V gives OUTA low). |
| 3 | COM | power_in | Ground; all voltage parameters are referenced to COM. |
| 4 | INB | input | Logic input for gate driver output OUTB, out of phase (CMOS Schmitt-triggered, 3.3V and 5V logic compatible; logic 1 below 0.8 V gives OUTB high, logic 0 above 2.5 V gives OUTB low). |
| 5 | OUTB | output | Gate drive output B with 2.3 A source and 3.3 A sink typical short-circuit pulsed current. |
| 6 | VCC | power_in | Supply voltage, recommended 11.2 V to 20 V (absolute maximum 20 V), with undervoltage lockout positive-going threshold typically 10.2 V. |
| 7 | OUTA | output | Gate drive output A with 2.3 A source and 3.3 A sink typical short-circuit pulsed current. |
| 8 | NC | unconnected | No connection. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage (absolute max) | VCC | -0.3 | 20 | V | 5 | ||
| Package power dissipation | PD | 0.625 | W | TA ≤ 25°C | 5 | ||
| Thermal resistance, junction to ambient | RthJA | 200 | °C/W | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | TS | -55 | 150 | °C | 5 | ||
| Lead temperature (soldering) | TL | 300 | °C | 10 seconds | 5 | ||
| Supply voltage (recommended) | VCC | 11.2 | 20 | V | 5 | ||
| Output voltage (recommended) | VO | 0 | 20 | V | max printed as VCC | 5 | |
| Logic input voltage (recommended) | VIN | 0 | 20 | V | max printed as VCC | 5 | |
| Ambient temperature | TA | -40 | 125 | °C | 5 | ||
| Vcc undervoltage positive going threshold | VCCUV+ | 9.2 | 10.2 | 11.2 | V | VCC = 15V, TA = 25°C | 6 |
| Vcc undervoltage negative going threshold | VCCUV- | 8.2 | 9.2 | 10.2 | V | VCC = 15V, TA = 25°C | 6 |
| Vcc undervoltage lockout hysteresis | VCCUVH | 1 | V | VCC = 15V, TA = 25°C | 6 | ||
| Logic 0 input voltage (OUTA = LO, OUTB = LO) | VIH | 2.5 | V | 6 | |||
| Logic 1 input voltage (OUTA = HI, OUTB = HI) | VIL | 0.8 | V | 6 | |||
| High level output voltage, VBIAS - VO | VOH | 1.4 | V | IO = 0 mA | 6 | ||
| Low level output voltage | VOL | 0.15 | V | IO = 20 mA | 6 | ||
| Logic 1 input bias current | IIN+ | 5 | 15 | µA | VIN = 0V | 6 | |
| Logic 0 input bias current | IIN- | -30 | -10 | µA | VIN = 5V | 6 | |
| Quiescent VCC supply current | IQCC | 170 | 340 | µA | VIN = 0V or 5V | 6 | |
| Output high short circuit pulsed current | IO+ | 2.3 | A | VO = 0V, VIN = 0V | 6 | ||
| Output low short circuit pulsed current | IO- | 3.3 | A | VO = 15V, VIN = 5V | 6 | ||
| Turn-on propagation delay | ton | 50 | 95 | ns | Figure 2 | 6 | |
| Turn-off propagation delay | toff | 50 | 95 | ns | Figure 2 | 6 | |
| Turn-on rise time | tr | 25 | 55 | ns | Figure 2 | 6 | |
| Turn-off fall time | tf | 25 | 55 | ns | Figure 2 | 6 |
CAD (KiCad official)
- Symbol:
IRS44262SPBF - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
irs44262spbf-etched.step/irs44262spbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);irs44262spbf.step/irs44262spbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (15 pp, sha256
b5a14808857b805b, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).