component
IRS2302SPBF
Public Made by Adomby adom
Infineon Technologies Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 7d ago |
| viewers | 7d ago |
| irs2302spbf-etched.glb | 7d ago |
| irs2302spbf-etched.step | 7d ago |
| irs2302spbf-hero.glb | 7d ago |
| irs2302spbf-hero.overlay.json | 7d ago |
| irs2302spbf.glb | 7d ago |
| irs2302spbf.kicad_mod | 7d ago |
| irs2302spbf.kicad_sym | 7d ago |
| irs2302spbf.lbr | 7d ago |
| irs2302spbf.step | 7d ago |
| package.json | 7d ago |
| page.json | 7d ago |
| README.md | 7d ago |
| verification.json | 7d ago |
IRS2302SPBF
Infineon Technologies · Gate Drive ICs · SOIC-8
IRS2302SPBF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low-side and logic fixed supply, recommended 5V to 20V (absolute max 25V). |
| 2 | IN | input | Logic input for high and low side gate driver outputs (HO and LO), in phase with HO; compatible with 3.3V, 5V and 15V logic. |
| 3 | SD | input | Logic input for shutdown, turns off both channels. |
| 4 | COM | power_in | Low-side return (ground reference for logic inputs and LO). |
| 5 | LO | output | Low-side gate drive output, swings from COM to VCC with 200mA/350mA typical source/sink pulsed current. |
| 6 | VS | power_in | High-side floating supply return, operational offset from 1V to 600V (recommended). |
| 7 | HO | output | High-side gate drive output, swings from VS to VB. |
| 8 | VB | power_in | High-side floating supply, recommended VS+5V to VS+20V (absolute max 625V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic 1 input voltage | VIH | 2.5 | V | VCC = 10V to 20V | 6 | ||
| Logic 0 input voltage | VIL | 0.8 | V | VCC = 10V to 20V | 6 | ||
| High level output voltage, VBIAS - VO | VOH | 0.2 | V | IO = 2mA | 6 | ||
| Low level output voltage | VOL | 0.1 | V | IO = 2mA | 6 | ||
| SD input positive going threshold | VSD, TH+ | 2.5 | V | Vcc = 10V to 20V | 6 | ||
| SD input negative going threshold | VSD, TH- | 0.8 | V | Vcc = 10V to 20V | 6 | ||
| Offset supply leakage current | ILK | 50 | µA | VB = VS = 600V | 6 | ||
| Quiescent VBS supply current | IQBS | 40 | 140 | 240 | µA | VIN = 0V or 5V | 6 |
| Quiescent VCC supply current | IQCC | 0.4 | 1 | 1.6 | mA | VIN = 0V or 5V | 6 |
| Logic 1 input bias current | IIN+ | 5 | 20 | µA | IN = 5V, SD = 0V | 6 | |
| Logic 0 input bias current | IIN- | 5 | µA | IN = 0V, SD = 5V | 6 | ||
| VCC and VBS supply undervoltage positive going threshold | VCCUV+/VBSUV+ | 3.3 | 4.1 | 5 | V | 6 | |
| VCC and VBS supply undervoltage negative going threshold | VCCUV-/VBSUV- | 3 | 3.8 | 4.7 | V | 6 | |
| UV hysteresis | VCCUVH/VBSUVH | 0.05 | 0.3 | V | 6 | ||
| Output high short circuit pulsed current | IO+ | 200 | mA | VO = 0V, PW ≤ 10µs | 6 | ||
| Output low short circuit pulsed current | IO- | 350 | mA | VO = 15V, PW ≤ 10µs | 6 | ||
| Turn-on propagation delay | ton | 450 | 650 | 850 | ns | VS = 0V | 7 |
| Turn-off propagation delay | toff | 200 | 280 | ns | VS = 0V or 600V | 7 | |
| Shut-down propagation delay | tsd | 200 | 280 | ns | 7 | ||
| Delay matching, HS & LS turn-on/off | MT | 0 | 50 | ns | 7 | ||
| Turn-on rise time | tr | 130 | 220 | ns | VS = 0V | 7 | |
| Turn-off fall time | tf | 50 | 80 | ns | VS = 0V | 7 | |
| Deadtime | DT | 300 | 450 | 600 | ns | 7 | |
| Deadtime matching | MDT | 0 | 60 | ns | 7 | ||
| High-side floating absolute voltage | VB | -0.3 | 625 | V | 5 | ||
| Low-side and logic fixed supply voltage | VCC | -0.3 | 25 | V | 5 | ||
| Allowable offset supply voltage transient | dVS/dt | 50 | V/ns | 5 | |||
| Package power dissipation | PD | 0.625 | W | TA ≤ 25°C | 5 | ||
| Thermal resistance, junction to ambient | RthJA | 200 | °C/W | 5 | |||
| Junction temperature | TJ | 150 | °C | 5 | |||
| Storage temperature | TS | -50 | 150 | °C | 5 | ||
| Lead temperature (soldering, 10 seconds) | TL | 300 | °C | 5 | |||
| High-side floating supply offset voltage | VS | 1 | 600 | V | Logic operational for VS of -5 V to +600 V | 5 | |
| Low-side and logic fixed supply voltage | VCC | 5 | 20 | V | 5 | ||
| Ambient temperature | TA | -40 | 125 | °C | 5 |
CAD (KiCad official)
- Symbol:
IRS2302SPBF - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files:
irs2302spbf-etched.step/irs2302spbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);irs2302spbf.step/irs2302spbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (16 pp, sha256
78f15616284ba57d, retrieved 2026-10-31, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).