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Contents

README

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IRS21867STR

UMW · Gate Drivers · SOP-8

IRS21867STR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Low side and logic fixed supply, recommended 6.8 V to 20 V with an absolute maximum of 25 V referenced to COM.
2 HIN input Logic input for the high side gate driver output (HO), in phase; compatible with 3.3 V, 5 V and 15 V logic, with VIH of 2.5 V minimum and VIL of 0.8 V maximum.
3 LIN input Logic input for the low side gate driver output (LO), in phase; compatible with 3.3 V, 5 V and 15 V logic, with VIH of 2.5 V minimum and VIL of 0.8 V maximum.
4 COM power_in Low side return; all voltage ratings are referenced to COM.
5 LO output Low side gate drive output, swinging between 0 V and VCC, with typical source/sink capability of 4 A.
6 VS power_in High side floating supply return, recommended range -9 V to 700 V; allowable negative Vs capability is -9 V.
7 HO output High side gate drive output, referenced to VS and swinging between VS and VB, with typical source/sink capability of 4 A.
8 VB power_in High side floating supply, recommended VS + 10 V to VS + 20 V with an absolute maximum of 725 V referenced to COM.

Key specifications

Parameter Value
Manufacturer UMW
Package SOP-8
Category Motor Driver ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Turn-on propagation delay tON 150 250 ns VS=0 4
Turn-off propagation delay tOFF 150 250 ns VS=0V or 700V 4
Turn-on rise time tR 10 15 ns VS=0 4
Turn-off fall time tF 6 9 ns 4
Matched propagation time delay MT 35 ns 4
VCC supply UVLO threshold (rising) VCCUV+ 4.5 5.5 6.5 V 4
VCC supply UVLO threshold (falling) VCCUV- 4 5 6 V 4
VBS supply UVLO threshold (rising) VBSUV+ 4.5 5.5 6.5 V 4
VBS supply UVLO threshold (falling) VBSUV- 4 5 6 V 4
High-side floating supply leakage current ILK 50 μA VB=VS=700V 4
Quiescent VB supply current IQBS 50 100 μA VIN=0V or 5V 4
Quiescent VCC supply current IQCC 100 150 μA 4
Logic “1” input voltage VIH 2.5 V VCC=10~20V 4
Logic “0” input voltage VIL 0.8 V 4
High level output voltage, VBIAS - VO VOH 1.4 V IO=0A 4
Low level output voltage, VO VOL 0.1 V IO=20mA 4
Logic “1” input bias current IIN+ 25 50 μA LIN=5V 4
Logic “0” input bias current IIN- 1 μA LIN=0V 4
Output high short circuit pulsed current IO+ 3 4 A Vo=0V, PW≤10µs 4
Output low short circuit pulsed current IO- 3 4 A Vo=15V, PW≤10µs 4
High side floating supply voltage (absolute maximum) VB -0.3 725 V 3
Low side and main power supply (absolute maximum) VCC -0.3 25 V 3
Low side gate drive output (absolute maximum) VLO -0.3 V 3
Logic input (HIN, LIN) (absolute maximum) VIN -0.3 V 3
ESD HBM model ESD 1.5 kV 3
ESD machine model ESD 500 V 3
Package power dissipation PD 0.625 W TA ≤25°C 3
Thermal resistance, junction to ambient RthJA 200 °C/W 3
Junction temperature TJ 150 °C 3
Storage temperature TS -55 150 °C 3
Lead temperature (soldering, 10 seconds) TL 300 °C 10 seconds soldering 3
High side floating supply return (recommended) VS -9 700 V 3
Low side and main power supply (recommended) VCC 6.8 20 V 3
Low side gate drive output (recommended) VLO 0 V 3
Logic input of HIN & LIN (recommended) VIN 0 V 3
Ambient temperature (recommended) TA -40 125 °C 3

CAD (KiCad official)

  • Symbol: IRS21867STR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: irs21867str-etched.step / irs21867str-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irs21867str.step / irs21867str.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (8 pp, sha256 c2d8fcef85d322f3, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF