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IRS21531DSTRPBF

Public Made by Adom

by adom

Infineon Technologies Gate Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Symbol & Footprint

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Contents

README

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IRS21531DSTRPBF

Infineon Technologies · Gate Drivers · SOIC-8

IRS21531DSTRPBF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Logic and internal gate drive supply voltage, with an internal 15.4 V typ. zener clamp (14.4 V min, 16.8 V max at ICC = 5 mA) and rising UVLO threshold of 11.0 V typ.
2 RT passive Oscillator timing resistor input, with RT of at least 1 kΩ setting the oscillator frequency together with CT.
3 CT passive Oscillator timing capacitor input (330 pF minimum recommended), where pulling below VCTSD (2.3 V typ., about 1/6 VCC) shuts down oscillation.
4 COM power_in IC power and signal ground.
5 LO output Low-side gate driver output with 180 mA source and 260 mA sink typical current.
6 VS power_in High voltage floating supply return, with steady state offset of -3.0 V to 600 V.
7 HO output High-side gate driver output with 180 mA source and 260 mA sink typical current.
8 VB power_in High side gate driver floating supply, with absolute maximum of 625 V.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOIC-8
Category Motor Driver ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High side floating supply voltage VB -0.3 625 V 2
Low side output voltage VLO -0.3 V 2
RT pin current IRT -5 5 mA 2
RT pin voltage VRT -0.3 V 2
CT pin voltage VCT -0.3 V 2
Supply current ICC 20 mA Note 1 2
Maximum allowable current at LO and HO due to external power transistor Miller effect IOMAX -500 500 mA 2
Allowable offset voltage slew rate dVS/dt -50 50 V/ns 2
Maximum power dissipation, 8-Pin SOIC PD 0.625 W TA ≤ +25 ºC 2
Thermal resistance, junction to ambient, 8-Pin SOIC RthJA 128 ºC/W 8-Pin SOIC 2
Junction temperature TJ -55 150 ºC 2
Storage temperature TS -55 150 ºC 2
Lead temperature (soldering) TL 300 ºC 10 seconds 2
Steady state side floating supply offset voltage VS -3 600 V 3
Supply current ICC 5 mA 3
Junction temperature TJ -40 125 ºC 3
Timing resistor value RT 1 kΩ 3
CT pin capacitor value CT 330 pF 3
Rising VCC undervoltage lockout threshold VCCUV+ 10 11 12 V 4
Falling VCC undervoltage lockout threshold VCCUV- 8 9 10 V 4
VCC undervoltage lockout hysteresis VCCUVHYS 1.6 2 2.4 V 4
Micropower startup VCC supply current IQCCUV 130 170 µA VCC ≤ VCCUV- 4
Quiescent VCC supply current IQCC 800 1000 µA 4
VCC zener clamp voltage VCC CLAMP 14.4 15.4 16.8 V ICC = 5 mA 4
Quiescent VBS supply current IQBS 60 80 µA 4
VBS supply undervoltage positive going threshold VBSUV+ 8 9 9.5 V 4
VBS supply undervoltage negative going threshold VBSUV- 7 8 9 V 4
Offset supply leakage current ILK 50 µA VB = VS = 600 V 4
Oscillator frequency fOSC 18.4 19 19.6 kHz RT = 36.5 kΩ 4
Oscillator frequency fOSC 88 93 100 kHz RT = 7.15 kΩ 4
CT pin current ICT 0.02 1 µA 4
UV-mode CT pin pulldown current ICTUV 0.2 0.3 0.6 mA VCC = 7 V 4
CT voltage shutdown threshold VCTSD 2.2 2.3 2.4 V 4
High-level RT output voltage, VCC - VRT VRT+ 10 50 mV IRT = -100 µA 4
High-level RT output voltage, VCC - VRT VRT+ 100 300 mV IRT = -1 mA 4
Low-level RT output voltage VRT- 10 50 mV IRT = 100 µA 4
Low-level RT output voltage VRT- 100 300 mV IRT = 1 mA 4
UV-mode RT output voltage VRTUV 0 100 mV VCC ≤ VCCUV- 4
SD-mode RT output voltage, VCC - VRT VRTSD 10 50 mV IRT = -100 µA, VCT = 0 V 4
SD-mode RT output voltage, VCC - VRT VRTSD 100 300 mV IRT = -1 mA, VCT = 0 V 4
Output rise time tr 120 220 ns 5
Output fall time tf 50 80 ns 5
Output deadtime (HO or LO) (IRS21531D) td 0.35 0.6 0.85 µs 5
VB source current when FET is on IB_CAP 40 55 mA CBS=0.1 uF 5
VB source current when FET is on IB_10V 10 12 mA VB=10 V 5

CAD (KiCad official)

  • Symbol: IRS21531DSTRPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: irs21531dstrpbf-etched.step / irs21531dstrpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irs21531dstrpbf.step / irs21531dstrpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (14 pp, sha256 65e7d40144f14c82, retrieved 2026-10-20, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF