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Contents

README

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IRLML6401TRPBF-JSM

JSMSEMI · MOSFETs · SOT-23

IRLML6401TRPBF-JSM from JSMSEMI, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; controls the P-channel MOSFET, with a gate-source voltage limit of ±10 V.
2 S passive Source; the drawing places it at the bottom-right pin, and the body diode conducts from drain to source (continuous source-drain diode current of -2.0 A).
3 D passive Drain; the single pin on the top side of the package. Drain-source voltage is -20 V and continuous drain current is -4.2 A at 25 °C.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOT-23
Category Triode/MOS Tube/Transistor
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-source breakdown voltage V(BR)DSS -20 V VGS = 0V, ID =-250µA 2
Gate-source threshold voltage VGS(th) -0.4 -0.6 -1 V VDS =VGS, ID =-250µA 2
Gate-source leakage IGSS -100 100 nA VDS =0V, VGS =±10V 2
Zero gate voltage drain current IDSS -1 µA VDS =-20V, VGS =0V 2
Drain-source on-state resistance RDS(on) 37 48 mΩ VGS =-4.5V, ID =-4A 2
Drain-source on-state resistance RDS(on) 40 55 mΩ VGS =-3.3V, ID =-3.0A 2
Drain-source on-state resistance RDS(on) 45 60 mΩ VGS =-2.5V, ID =-2.0A 2
Body diode voltage VSD -0.87 -1.2 V IS=-4A 2
Continuous source-drain diode current IS -2 A TC=25℃ 2
Drain-Source Voltage VDS -20 V TA = 25°C 1
Gate-Source Voltage VGS -10 10 V TA = 25°C 1
Continuous Drain Current ID -4.2 A TA = 25°C 1
Continuous Drain Current ID -2.8 A TA = 70°C 1
Pulsed Drain Current IDM -16.8 A Pulse width limited by maximum junction temperature 1
Maximum Power Dissipation PD 1.25 W TA = 25°C, surface mounted on FR4 board, t ≤ 5 sec 1
Maximum Power Dissipation PD 1 W TA = 70°C, surface mounted on FR4 board, t ≤ 5 sec 1
Operating Junction and Storage Temperature Range TJ, Tstg -50 150 °C 1
Junction-to-Ambient Thermal Resistance RthJA 100 °C/W PCB mounted, surface mounted on FR4 board, t ≤ 5 sec 1
Forward transconductance gfs 6.5 S VDS =-5V, ID =-2.8A 2
Input capacitance Ciss 760 pF VDS =-10V, VGS =0V, f =1MHz 2
Output capacitance Coss 94 pF VDS =-10V, VGS =0V, f =1MHz 2
Reverse transfer capacitance Crss 76 pF VDS =-10V, VGS =0V, f =1MHz 2
Total gate charge Qg 7.8 nC VDS =-10V, VGS =-4.5V, ID =-3A 2
Gate-source charge Qgs 0.9 nC VDS =-10V, VGS =-4.5V, ID =-3A 2
Gate-drain charge Qgd 1.8 nC VDS =-10V, VGS =-4.5V, ID =-3A 2
Turn-on delay time td(on) 5.5 ns VDD=-10V, RL=1.2Ω, ID =-2A, VGEN=-4.5V, Rg=3.3Ω 2
Rise time tr 3.9 ns VDD=-10V, RL=1.2Ω, ID =-2A, VGEN=-4.5V, Rg=3.3Ω 2
Turn-off delay time td(off) 11.3 ns VDD=-10V, RL=1.2Ω, ID =-2A, VGEN=-4.5V, Rg=3.3Ω 2
Fall time tf 36 ns VDD=-10V, RL=1.2Ω, ID =-2A, VGEN=-4.5V, Rg=3.3Ω 2

CAD (KiCad official)

  • Symbol: IRLML6401TRPBF-JSM
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: irlml6401trpbf-jsm-etched.step / irlml6401trpbf-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irlml6401trpbf-jsm.step / irlml6401trpbf-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (5 pp, sha256 554bf7044d17495f, retrieved 2026-10-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF