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IRLML0030TR-JSM

Public Made by Adom

by adom

JSMSEMI MOSFETs, SOT-23. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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IRLML0030TR-JSM

JSMSEMI · MOSFETs · SOT-23

IRLML0030TR-JSM from JSMSEMI, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; logic-level gate with VGS(th) 1 V min to 2 V max and absolute maximum VGSS of ±20 V.
2 S passive Source; continuous source current (diode conduction) is rated 1.5 A.
3 D passive Drain; VDSS is 30 V and continuous drain current is 6.0 A at TC=25°C (VGS=10 V), pulsed 20 A.

Key specifications

Parameter Value
Manufacturer JSMSEMI
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: IRLML0030TR-JSM
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: irlml0030tr-jsm-etched.step / irlml0030tr-jsm-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irlml0030tr-jsm.step / irlml0030tr-jsm.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: JSMSEMI datasheet (5 pp, sha256 d0c96938075a4809, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF