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IRFS7430TRL7PP

Infineon Technologies · MOSFETs · TO-263-7

IRFS7430TRL7PP from Infineon Technologies, in a TO-263-7. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-to-source voltage is rated ±20 V with a typical threshold of 3.0 V (2.2 to 3.9 V) at ID = 250µA.
2 S passive Source; continuous drain current is 240A wire-bond limited (522A silicon limited) at TC = 25°C.
3 S passive Source; continuous drain current is 240A wire-bond limited (522A silicon limited) at TC = 25°C.
4 D passive Drain, connected to the exposed tab (no separate lead at position 4); VDSS is 40V with RDS(on) of 0.55mΩ typ and 0.75mΩ max at VGS = 10V, ID = 100A.
5 S passive Source; continuous drain current is 240A wire-bond limited (522A silicon limited) at TC = 25°C.
6 S passive Source; continuous drain current is 240A wire-bond limited (522A silicon limited) at TC = 25°C.
7 S passive Source; continuous drain current is 240A wire-bond limited (522A silicon limited) at TC = 25°C.
8 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-263-7
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Forward Transconductance gfs 176 S VDS = 10V, ID =100A 3
Total Gate Charge Qg 305 460 nC ID = 100A 3
Drain-to-Source Breakdown Voltage V(BR)DSS 40 V VGS = 0V, ID = 250µA 2
Static Drain-to-Source On-Resistance RDS(on) 0.55 0.75 mΩ VGS = 10V, ID = 100A 2
Gate Threshold Voltage VGS(th) 2.2 3 3.9 V VDS = VGS, ID = 250µA 2
Drain-to-Source Leakage Current IDSS 1 µA VDS =40 V, VGS = 0V 2
Drain-to-Source Leakage Current (TJ = 125°C) IDSS 150 µA VDS =40V,VGS = 0V,TJ =125°C 2
Gate-to-Source Forward Leakage IGSS 100 nA VGS = 20V 2
Gate-to-Source Reverse Leakage IGSS -100 nA VGS = -20V 2
Diode Forward Voltage VSD 0.8 1.2 V TJ = 25°C,IS = 100A,VGS = 0V 3
Continuous Source Current IS 522 A 3
Pulsed Source Current ISM 1200 A 3
Continuous Drain Current, VGS @ 10V (Silicon Limited) ID 522 A TC = 25°C 2
Continuous Drain Current, VGS @ 10V (Silicon Limited) ID 369 A TC = 100°C 2
Continuous Drain Current, VGS @ 10V (Wire Bond Limited) ID 240 A TC = 25°C 2
Pulsed Drain Current IDM 1200 A 2
Maximum Power Dissipation PD 375 W TC = 25°C 2
Linear Derating Factor 2.5 W/°C 2
Gate-to-Source Voltage VGS -20 20 V 2
Operating Junction and Storage Temperature Range TJ, TSTG -55 175 °C 2
Soldering Temperature, for 10 seconds (1.6mm from case) 300 2
Single Pulse Avalanche Energy (Thermally limited) EAS 764 mJ 2
Single Pulse Avalanche Energy (Thermally limited) EAS 1454 mJ 2
Junction-to-Case RθJC 0.4 °C/W 2
Junction-to-Ambient RθJA 40 °C/W 2

CAD (KiCad official)

  • Symbol: IRFS7430TRL7PP
  • Footprint: Package_TO_SOT_SMD:TO-263-7_TabPin8
  • 3D model: TO-263-7 (KiCad packages3D, STEP)
  • 3D model files: irfs7430trl7pp-etched.step / irfs7430trl7pp-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irfs7430trl7pp.step / irfs7430trl7pp.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (11 pp, sha256 0059fd36958be23f, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF