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Contents

README

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IRFR420TRPBF

Vishay Intertech · MOSFETs · DPAK

IRFR420TRPBF from Vishay Intertech, in a DPAK. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal; absolute maximum voltage rating ±20 V with gate-source threshold voltage of 2.0 to 4.0 V for MOSFET control.
2 Drain passive Drain terminal; maximum 500 V drain-source voltage, 2.4 A continuous drain current at TC = 25°C (1.5 A at 100°C), with 3.0 Ω maximum on-resistance at VGS = 10 V.
3 Source passive Source terminal; integral reverse p-n junction diode with 2.4 A continuous source-drain diode current rating and 1.6 V maximum diode forward voltage drop.

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package DPAK
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: IRFR420TRPBF
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: DPAK (KiCad packages3D, STEP)
  • 3D model files: irfr420trpbf-etched.step / irfr420trpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irfr420trpbf.step / irfr420trpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (12 pp, sha256 9ce50772b88c08d8, retrieved 2026-09-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF