component

IRF9388TR

Public Made by Adom

by adom

UMW MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
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docs Publish 0.1.0 · Ray 5h ago
viewers irf9388tr: viewers · Ray 5h ago
irf9388tr-etched.glb irf9388tr: factory component page (tier=lcsc) · Ray 5h ago
irf9388tr-etched.step irf9388tr: factory component page (tier=lcsc) · Ray 5h ago
irf9388tr-hero.glb irf9388tr: hero GLB from the etched model (keeps the MPN mark) · Ray 5h ago
irf9388tr-hero.overlay.json Publish 0.1.0 · Ray 5h ago
irf9388tr.glb Publish 0.1.0 · Ray 5h ago
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irf9388tr.kicad_sym Publish 0.1.0 · Ray 5h ago
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irf9388tr.step Publish 0.1.0 · Ray 5h ago
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README.md Publish 0.1.0 · Ray 5h ago

IRF9388TR

UMW · MOSFETs · SOP-8

IRF9388TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are tied together as SOURCE and the device is rated for VDS = -30V.
2 S passive Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are tied together as SOURCE and the device is rated for VDS = -30V.
3 S passive Source terminal of the P-channel MOSFET; pins 1, 2 and 3 are tied together as SOURCE and the device is rated for VDS = -30V.
4 G input Gate terminal; the absolute maximum gate-to-source voltage is VGS = ±25V.
5 D passive Drain terminal of the P-channel MOSFET; pins 5, 6, 7 and 8 are tied together as DRAIN, with continuous drain current ID = -12A at TA = 25°C.
6 D passive Drain terminal of the P-channel MOSFET; pins 5, 6, 7 and 8 are tied together as DRAIN, with continuous drain current ID = -12A at TA = 25°C.
7 D passive Drain terminal of the P-channel MOSFET; pins 5, 6, 7 and 8 are tied together as DRAIN, with continuous drain current ID = -12A at TA = 25°C.
8 D passive Drain terminal of the P-channel MOSFET; pins 5, 6, 7 and 8 are tied together as DRAIN, with continuous drain current ID = -12A at TA = 25°C.

Key specifications

Parameter Value
Manufacturer UMW
Package SOP-8
Category Transistors/Thyristors
Pins 8

CAD (KiCad official)

  • Symbol: IRF9388TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: irf9388tr-etched.step / irf9388tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irf9388tr.step / irf9388tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (10 pp, sha256 ce35e2ef69d16def, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF