# IRF7455TR

**UMW** · MOSFETs · SOP-8

IRF7455TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | SOURCE terminal of the N-channel MOSFET; pins 1, 2 and 3 are all listed as SOURCE in the pinning table. |
| 2 | S | passive | SOURCE terminal of the N-channel MOSFET; pins 1, 2 and 3 are all listed as SOURCE in the pinning table. |
| 3 | S | passive | SOURCE terminal of the N-channel MOSFET; pins 1, 2 and 3 are all listed as SOURCE in the pinning table. |
| 4 | G | input | GATE terminal; the datasheet gives a gate-to-source voltage rating of ±12 V. |
| 5 | D | passive | DRAIN terminal of the N-channel MOSFET; pins 5 through 8 are all listed as DRAIN, with a drain-to-source voltage rating of 30 V. |
| 6 | D | passive | DRAIN terminal of the N-channel MOSFET; pins 5 through 8 are all listed as DRAIN, with a drain-to-source voltage rating of 30 V. |
| 7 | D | passive | DRAIN terminal of the N-channel MOSFET; pins 5 through 8 are all listed as DRAIN, with a drain-to-source voltage rating of 30 V. |
| 8 | D | passive | DRAIN terminal of the N-channel MOSFET; pins 5 through 8 are all listed as DRAIN, with a drain-to-source voltage rating of 30 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-to-Source Voltage | VDS |  |  | 30 | V |  | 1 |
| Gate-to-Source Voltage | VGS | -12 |  | 12 | V |  | 1 |
| Continuous Drain Current | ID |  |  | 15 | A | VGS=-10V, TA=25°C | 1 |
| Continuous Drain Current | ID |  |  | 12 | A | VGS=-10V, TA=70°C | 1 |
| Pulsed Drain Current | IDM |  |  | 120 | A | Repetitive rating; pulse width limited by max. junction temperature | 1 |
| Maximum Power Dissipation | PD |  |  | 2.5 | W | TA=25°C | 1 |
| Maximum Power Dissipation | PD |  |  | 1.6 | W | TA=70°C | 1 |
| Junction and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 1 |
| Drain-Source Breakdown Voltage | V(BR)DSS | 30 |  |  | V | ID=250µA, VGS=0V | 3 |
| Breakdown Voltage Temp. Coefficient | ΔV(BR)DSS/TJ |  | 0.029 |  | V/°C | ID=1mA, Reference to 25°C | 3 |
| Static Drain-to-Source On-Resistance | RDS(ON) |  |  | 7.5 | mΩ | VGS=10V (from Features; table row not reliably aligned) | 1 |
| Static Drain-to-Source On-Resistance | RDS(ON) |  |  | 9 | mΩ | VGS=4.5V (from Features; table row not reliably aligned) | 1 |
| Maximum Junction-to-Ambient | RθJA |  |  | 50 | °C/W |  | 2 |

## CAD (KiCad official)

- Symbol: `IRF7455TR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `irf7455tr-etched.step` / `irf7455tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irf7455tr.step` / `irf7455tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755879203567091712) (12 pp, sha256 `ce49930993486993`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/irf7455tr-datasheet.pdf)