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IRF7404TRPBF
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Infineon Technologies MOSFETs, SO-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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IRF7404TRPBF
Infineon Technologies · MOSFETs · SO-8
IRF7404TRPBF from Infineon Technologies, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET (pin 1 of the SO-8, shown as S on the Top View). |
| 2 | S | passive | Source of the P-channel MOSFET (pin 2 of the SO-8, shown as S on the Top View). |
| 3 | S | passive | Source of the P-channel MOSFET (pin 3 of the SO-8, shown as S on the Top View). |
| 4 | G | input | Gate of the P-channel MOSFET; gate-to-source voltage is rated ±12 V maximum. |
| 5 | D | passive | Drain of the P-channel MOSFET; VDSS is -20 V, with continuous drain current of -6.7 A at TA = 25°C. |
| 6 | D | passive | Drain of the P-channel MOSFET; VDSS is -20 V, with continuous drain current of -6.7 A at TA = 25°C. |
| 7 | D | passive | Drain of the P-channel MOSFET; VDSS is -20 V, with continuous drain current of -6.7 A at TA = 25°C. |
| 8 | D | passive | Drain of the P-channel MOSFET; VDSS is -20 V, with continuous drain current of -6.7 A at TA = 25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
CAD (KiCad official)
- Symbol:
IRF7404TRPBF - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files:
irf7404trpbf-etched.step/irf7404trpbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);irf7404trpbf.step/irf7404trpbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (9 pp, sha256
8a7df631ac7abc21, retrieved 2026-10-16, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# IRF7404TRPBF
**Infineon Technologies** · MOSFETs · SO-8
IRF7404TRPBF from Infineon Technologies, in a SO-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source of the P-channel MOSFET (pin 1 of the SO-8, shown as S on the Top View). |
| 2 | S | passive | Source of the P-channel MOSFET (pin 2 of the SO-8, shown as S on the Top View). |
| 3 | S | passive | Source of the P-channel MOSFET (pin 3 of the SO-8, shown as S on the Top View). |
| 4 | G | input | Gate of the P-channel MOSFET; gate-to-source voltage is rated ±12 V maximum. |
| 5 | D | passive | Drain of the P-channel MOSFET; VDSS is -20 V, with continuous drain current of -6.7 A at TA = 25°C. |
| 6 | D | passive | Drain of the P-channel MOSFET; VDSS is -20 V, with continuous drain current of -6.7 A at TA = 25°C. |
| 7 | D | passive | Drain of the P-channel MOSFET; VDSS is -20 V, with continuous drain current of -6.7 A at TA = 25°C. |
| 8 | D | passive | Drain of the P-channel MOSFET; VDSS is -20 V, with continuous drain current of -6.7 A at TA = 25°C. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SO-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## CAD (KiCad official)
- Symbol: `IRF7404TRPBF`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SO-8 (KiCad packages3D, STEP)
- 3D model files: `irf7404trpbf-etched.step` / `irf7404trpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irf7404trpbf.step` / `irf7404trpbf.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8579711132841394176) (9 pp, sha256 `8a7df631ac7abc21`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/irf7404trpbf-datasheet.pdf)