# IRF7341

**Slkor SLKORMICRO Elec** · MOSFETs · SOP-8

IRF7341 from Slkor SLKORMICRO Elec, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source of MOSFET 1 (N-channel, VDS 60V max). |
| 2 | G1 | input | Gate of MOSFET 1, VGS limited to ±20V. |
| 3 | S2 | passive | Source of MOSFET 2 (N-channel, VDS 60V max). |
| 4 | G2 | input | Gate of MOSFET 2, VGS limited to ±20V. |
| 5 | D2 | passive | Drain of MOSFET 2, continuous current 5A at TA=25℃, pulsed 18A. |
| 6 | D2 | passive | Drain of MOSFET 2, continuous current 5A at TA=25℃, pulsed 18A. |
| 7 | D1 | passive | Drain of MOSFET 1, continuous current 5A at TA=25℃, pulsed 18A. |
| 8 | D1 | passive | Drain of MOSFET 1, continuous current 5A at TA=25℃, pulsed 18A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Slkor SLKORMICRO Elec |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS |  |  | 60 | V |  | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Continuous Drain Current | ID |  |  | 3.5 | A | TA=70℃ | 1 |
| Drain Current-Pulsed | IDM |  |  | 18 | A |  | 1 |
| Single Pulse Avalanche Energy | EAS |  |  | 22 | mJ |  | 1 |
| Avalanche Current | IAS |  |  | 21 | A |  | 1 |
| Power Dissipation | PD |  |  | 1.5 | W |  | 1 |
| Operating and Storage Junction Temperature Range | TJ, TSTG | -55 |  | 150 | ℃ |  | 1 |
| Thermal Resistance, Junction to Ambient | RθJA |  |  | 85 | ℃/W |  | 1 |
| Thermal Resistance, Junction to Case | RθJC |  |  | 25 | ℃/W |  | 1 |
| Drain-Source Breakdown Voltage | BVDSS | 60 |  |  | V | VGS=0V, ID=250μA | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | μA | VGS=0V, VDS=48V, TJ=25℃ | 2 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 5 | μA | VGS=0V, VDS=48V, TJ=55℃ | 2 |
| Gate-Source Leakage Current | IGSS | -100 |  | 100 | nA | VGS=±20V, VDS=0A | 2 |
| Gate-Source Threshold Voltage | VGS(th) | 1 |  | 2.5 | V | VGS=VDS, ID=250μA | 2 |
| Drain-Source On Resistance | RDS(ON) |  | 30 | 36 | mΩ | VGS=10V, ID=4A | 2 |
| Drain-Source On Resistance | RDS(ON) |  | 34 | 45 | mΩ | VGS=4.5V, ID=3A | 2 |
| Source-Drain Diode Forward Voltage | VSD |  |  | 1.2 | V | VGS=0V, IS=1A, TJ=25℃ | 3 |
| Continuous Source Current | IS |  |  | 4.5 | A | VG=VD=0V, Force Current | 3 |
| Pulsed Source Current | ISM |  |  | 18 | A |  | 3 |

## CAD (KiCad official)

- Symbol: `IRF7341`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `irf7341-etched.step` / `irf7341-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irf7341.step` / `irf7341.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Slkor SLKORMICRO Elec datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602879105201557504) (6 pp, sha256 `3d6289fcc7452f4a`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/irf7341-datasheet.pdf)