component
IRF7328TR
Public Made by Adomby adom
UMW MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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IRF7328TR
UMW · MOSFETs · SOP-8
IRF7328TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of MOSFET 1 (dual P-channel, VDS = -30 V, continuous ID = -8 A at VGS = -10 V). |
| 2 | G1 | input | Gate terminal of MOSFET 1; gate-to-source voltage is rated VGS = ±20 V absolute maximum. |
| 3 | S2 | passive | Source terminal of MOSFET 2 (dual P-channel, VDS = -30 V, continuous ID = -8 A at VGS = -10 V). |
| 4 | G2 | input | Gate terminal of MOSFET 2; gate-to-source voltage is rated VGS = ±20 V absolute maximum. |
| 5 | D1 | passive | Drain terminal of the MOSFETs (D1 and D2 are tied together on this pin group); drain-source voltage rated -30 V. |
| 6 | D1 | passive | Drain terminal of the MOSFETs (D1 and D2 are tied together on this pin group); drain-source voltage rated -30 V. |
| 7 | D2 | passive | Drain terminal of the MOSFETs (D1 and D2 are tied together on this pin group); drain-source voltage rated -30 V. |
| 8 | D2 | passive | Drain terminal of the MOSFETs (D1 and D2 are tied together on this pin group); drain-source voltage rated -30 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -30 | V | 1 | |||
| Continuous Drain Current | ID | -8 | A | VGS=-10V | 1 | ||
| Continuous Drain Current | ID | -6.4 | A | VGS=-10V | 1 | ||
| Pulsed Drain Current | IDM | -32 | A | ① Repetitive rating; pulse width limited by max.junction temperature | 1 | ||
| Maximum Power Dissipation | PD | 2 | W | ③ Surface mounted on FR-4 board, t ≤ 10sec | 1 | ||
| Maximum Power Dissipation | PD | 1.3 | W | ③ Surface mounted on FR-4 board, t ≤ 10sec | 1 | ||
| Gate-to-Source Voltage | VGS | -20 | 20 | V | 1 | ||
| Junction and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Maximum Junction-to-Ambient | RθJA | 62.5 | °C/W | ③ Surface mounted on FR-4 board, t ≤ 10sec | 1 | ||
| Drain-Source Breakdown Voltage | V(BR)DSS | -30 | V | ID=-250µA, VGS=0V | 2 | ||
| Gate Threshold Voltage | VGS(th) | -1 | -2.5 | V | VDS=VGS, ID=-250μA | 2 | |
| Static Drain-to-Source On-Resistance | RDS(ON) | 17 | 21 | mΩ | VGS=-10V, ID=-8A | 2 | |
| Static Drain-to-Source On-Resistance | RDS(ON) | 26.8 | 32 | mΩ | VGS=-4.5V, ID=-6.8A | 2 | |
| Gate-to-Source Forward Leakage | IGSS | -100 | nA | VGS=-20V | 2 | ||
| Gate-to-Source Reverse Leakage | IGSS | 100 | nA | VGS=20V | 2 | ||
| Total Gate Charge | Qg | 52 | 78 | nC | ID=-8A, VDS=-15V, VGS=-10V | 2 | |
| Turn-On Delay Time | tD(on) | 13 | 20 | ns | VDD=-15V, VGS=-10V, ID=-1A, RG=6Ω, RD=15Ω | 2 | |
| Rise Time | tr | 15 | 23 | ns | VDD=-15V, VGS=-10V, ID=-1A, RG=6Ω, RD=15Ω | 2 | |
| Turn-Off Delay Time | tD(off) | 198 | 297 | ns | VDD=-15V, VGS=-10V, ID=-1A, RG=6Ω, RD=15Ω | 2 | |
| Fall Time | tf | 98 | 147 | ns | VDD=-15V, VGS=-10V, ID=-1A, RG=6Ω, RD=15Ω | 2 | |
| Forward Transconductance | gFS | 12 | S | VDS=-10V, ID=-8A | 2 | ||
| Breakdown Voltage Temp. Coefficient | ΔV(BR)DSS/TJ | 0.018 | V/°C | ID=-1mA, Reference to 25°C | 2 | ||
| Input Capacitance | Ciss | 2675 | pF | VGS=0V, VDS=-25V, ƒ=1.0MHz | 2 | ||
| Output Capacitance | Coss | 409 | pF | VGS=0V, VDS=-25V, ƒ=1.0MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 262 | pF | VGS=0V, VDS=-25V, ƒ=1.0MHz | 2 |
CAD (KiCad official)
- Symbol:
IRF7328TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
irf7328tr-etched.step/irf7328tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);irf7328tr.step/irf7328tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (10 pp, sha256
75ec48de436e247d, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# IRF7328TR
**UMW** · MOSFETs · SOP-8
IRF7328TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of MOSFET 1 (dual P-channel, VDS = -30 V, continuous ID = -8 A at VGS = -10 V). |
| 2 | G1 | input | Gate terminal of MOSFET 1; gate-to-source voltage is rated VGS = ±20 V absolute maximum. |
| 3 | S2 | passive | Source terminal of MOSFET 2 (dual P-channel, VDS = -30 V, continuous ID = -8 A at VGS = -10 V). |
| 4 | G2 | input | Gate terminal of MOSFET 2; gate-to-source voltage is rated VGS = ±20 V absolute maximum. |
| 5 | D1 | passive | Drain terminal of the MOSFETs (D1 and D2 are tied together on this pin group); drain-source voltage rated -30 V. |
| 6 | D1 | passive | Drain terminal of the MOSFETs (D1 and D2 are tied together on this pin group); drain-source voltage rated -30 V. |
| 7 | D2 | passive | Drain terminal of the MOSFETs (D1 and D2 are tied together on this pin group); drain-source voltage rated -30 V. |
| 8 | D2 | passive | Drain terminal of the MOSFETs (D1 and D2 are tied together on this pin group); drain-source voltage rated -30 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -30 | | | V | | 1 |
| Continuous Drain Current | ID | -8 | | | A | VGS=-10V | 1 |
| Continuous Drain Current | ID | -6.4 | | | A | VGS=-10V | 1 |
| Pulsed Drain Current | IDM | -32 | | | A | ① Repetitive rating; pulse width limited by max.junction temperature | 1 |
| Maximum Power Dissipation | PD | | | 2 | W | ③ Surface mounted on FR-4 board, t ≤ 10sec | 1 |
| Maximum Power Dissipation | PD | | | 1.3 | W | ③ Surface mounted on FR-4 board, t ≤ 10sec | 1 |
| Gate-to-Source Voltage | VGS | -20 | | 20 | V | | 1 |
| Junction and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 1 |
| Maximum Junction-to-Ambient | RθJA | | | 62.5 | °C/W | ③ Surface mounted on FR-4 board, t ≤ 10sec | 1 |
| Drain-Source Breakdown Voltage | V(BR)DSS | -30 | | | V | ID=-250µA, VGS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | -1 | | -2.5 | V | VDS=VGS, ID=-250μA | 2 |
| Static Drain-to-Source On-Resistance | RDS(ON) | | 17 | 21 | mΩ | VGS=-10V, ID=-8A | 2 |
| Static Drain-to-Source On-Resistance | RDS(ON) | | 26.8 | 32 | mΩ | VGS=-4.5V, ID=-6.8A | 2 |
| Gate-to-Source Forward Leakage | IGSS | | | -100 | nA | VGS=-20V | 2 |
| Gate-to-Source Reverse Leakage | IGSS | | | 100 | nA | VGS=20V | 2 |
| Total Gate Charge | Qg | | 52 | 78 | nC | ID=-8A, VDS=-15V, VGS=-10V | 2 |
| Turn-On Delay Time | tD(on) | | 13 | 20 | ns | VDD=-15V, VGS=-10V, ID=-1A, RG=6Ω, RD=15Ω | 2 |
| Rise Time | tr | | 15 | 23 | ns | VDD=-15V, VGS=-10V, ID=-1A, RG=6Ω, RD=15Ω | 2 |
| Turn-Off Delay Time | tD(off) | | 198 | 297 | ns | VDD=-15V, VGS=-10V, ID=-1A, RG=6Ω, RD=15Ω | 2 |
| Fall Time | tf | | 98 | 147 | ns | VDD=-15V, VGS=-10V, ID=-1A, RG=6Ω, RD=15Ω | 2 |
| Forward Transconductance | gFS | | 12 | | S | VDS=-10V, ID=-8A | 2 |
| Breakdown Voltage Temp. Coefficient | ΔV(BR)DSS/TJ | | 0.018 | | V/°C | ID=-1mA, Reference to 25°C | 2 |
| Input Capacitance | Ciss | | 2675 | | pF | VGS=0V, VDS=-25V, ƒ=1.0MHz | 2 |
| Output Capacitance | Coss | | 409 | | pF | VGS=0V, VDS=-25V, ƒ=1.0MHz | 2 |
| Reverse Transfer Capacitance | Crss | | 262 | | pF | VGS=0V, VDS=-25V, ƒ=1.0MHz | 2 |
## CAD (KiCad official)
- Symbol: `IRF7328TR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `irf7328tr-etched.step` / `irf7328tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irf7328tr.step` / `irf7328tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755879057286275072) (10 pp, sha256 `75ec48de436e247d`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/irf7328tr-datasheet.pdf)