component
IRF7324TR
Public Made by Adomby adom
UMW MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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IRF7324TR
UMW · MOSFETs · SOP-8
IRF7324TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of MOSFET 1 (dual P-channel); the datasheet gives no separate pin limit for this terminal, and VDS is rated -20 V and VGS ±12 V. |
| 2 | G1 | input | Gate terminal of MOSFET 1; the absolute maximum gate-to-source voltage is ±12 V. |
| 3 | S2 | passive | Source terminal of MOSFET 2 (dual P-channel); the datasheet gives no separate pin limit for this terminal, and VDS is rated -20 V and VGS ±12 V. |
| 4 | G2 | input | Gate terminal of MOSFET 2; the absolute maximum gate-to-source voltage is ±12 V. |
| 5 | D1,D2 | passive | Drain terminal shared by the two MOSFETs in the package group 5-8; the drain-source voltage is limited to -20 V and continuous drain current is -9 A at VGS=-4.5 V (TA=25°C). |
| 6 | D1,D2 | passive | Drain terminal shared by the two MOSFETs in the package group 5-8; the drain-source voltage is limited to -20 V and continuous drain current is -9 A at VGS=-4.5 V (TA=25°C). |
| 7 | D1,D2 | passive | Drain terminal shared by the two MOSFETs in the package group 5-8; the drain-source voltage is limited to -20 V and continuous drain current is -9 A at VGS=-4.5 V (TA=25°C). |
| 8 | D1,D2 | passive | Drain terminal shared by the two MOSFETs in the package group 5-8; the drain-source voltage is limited to -20 V and continuous drain current is -9 A at VGS=-4.5 V (TA=25°C). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -20 | V | TA=25°C unless otherwise noted | 1 | ||
| Continuous Drain Current | ID | -9 | A | VGS=-4.5V | 1 | ||
| Continuous Drain Current | ID | -7.1 | A | VGS=-4.5V | 1 | ||
| Pulsed Drain Current | IDM | -71 | A | Repetitive rating; pulse width limited by max. junction temperature (note 1) | 1 | ||
| Maximum Power Dissipation | PD | 2 | W | Surface mounted on FR-4 board, t ≤ 10 sec (note 3) | 1 | ||
| Maximum Power Dissipation | PD | 1.3 | W | Surface mounted on FR-4 board, t ≤ 10 sec (note 3) | 1 | ||
| Linear Derating Factor | 16 | mW/°C | 1 | ||||
| Gate-to-Source Voltage | VGS | -12 | 12 | V | 1 | ||
| Junction and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 1 | ||
| Drain-Source Breakdown Voltage | V(BR)DSS | -20 | V | ID=-250µA, VGS=0V | 2 | ||
| Gate Threshold Voltage | VGS(th) | -0.45 | -1 | V | VDS=VGS, ID=-250μA | 2 | |
| Static Drain-to-Source On-Resistance | RDS(ON) | 18 | mΩ | VGS=-4.5V, ID=-9A | 2 | ||
| Static Drain-to-Source On-Resistance | RDS(ON) | 26 | mΩ | VGS=-2.5V, ID=-7.7A | 2 | ||
| Gate-to-Source Forward Leakage | IGSS | -100 | nA | VGS=-12V | 2 | ||
| Gate-to-Source Reverse Leakage | IGSS | 100 | nA | VGS=12V | 2 | ||
| Drain-to-Source Leakage Current | IDSS | -1 | µA | VDS=-16V, VGS=0V | 2 | ||
| Drain-to-Source Leakage Current | IDSS | -25 | µA | VDS=-16V, VGS=0V, TJ=125°C | 2 | ||
| Total Gate Charge | Qg | 42 | 63 | nC | ID=-9A, VDS=-16V, VGS=-5V | 2 | |
| Gate-to-Source Charge | Qgs | 7.1 | 11 | nC | ID=-9A, VDS=-16V, VGS=-5V | 2 | |
| Gate-to-Drain (Miller) Charge | Qgd | 12 | 18 | nC | ID=-9A, VDS=-16V, VGS=-5V | 2 | |
| Maximum Junction-to-Ambient | RθJA | 62.5 | °C/W | Surface mounted on FR-4 board, t ≤ 10 sec (note 3) | 2 | ||
| Continuous Source Current (Body Diode) | IS | -2 | A | 3 | |||
| Pulsed Source Current (Body Diode) | ISM | -71 | A | Repetitive rating; pulse width limited by max. junction temperature (note 1) | 3 | ||
| Diode Forward Voltage | VSD | -1.2 | V | TJ=25°C, IS=-2A, VGS=0V (note 2) | 3 | ||
| Reverse Recovery Time | trr | 180 | 270 | ns | TJ=25°C, IF=-2A, dI/dt=-100A/μs (note 2) | 3 | |
| Reverse Recovery Charge | Qrr | 300 | 450 | nC | TJ=25°C, IF=-2A, dI/dt=-100A/μs (note 2) | 3 |
CAD (KiCad official)
- Symbol:
IRF7324TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
irf7324tr-etched.step/irf7324tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);irf7324tr.step/irf7324tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (10 pp, sha256
0a35b633c264213e, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# IRF7324TR
**UMW** · MOSFETs · SOP-8
IRF7324TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of MOSFET 1 (dual P-channel); the datasheet gives no separate pin limit for this terminal, and VDS is rated -20 V and VGS ±12 V. |
| 2 | G1 | input | Gate terminal of MOSFET 1; the absolute maximum gate-to-source voltage is ±12 V. |
| 3 | S2 | passive | Source terminal of MOSFET 2 (dual P-channel); the datasheet gives no separate pin limit for this terminal, and VDS is rated -20 V and VGS ±12 V. |
| 4 | G2 | input | Gate terminal of MOSFET 2; the absolute maximum gate-to-source voltage is ±12 V. |
| 5 | D1,D2 | passive | Drain terminal shared by the two MOSFETs in the package group 5-8; the drain-source voltage is limited to -20 V and continuous drain current is -9 A at VGS=-4.5 V (TA=25°C). |
| 6 | D1,D2 | passive | Drain terminal shared by the two MOSFETs in the package group 5-8; the drain-source voltage is limited to -20 V and continuous drain current is -9 A at VGS=-4.5 V (TA=25°C). |
| 7 | D1,D2 | passive | Drain terminal shared by the two MOSFETs in the package group 5-8; the drain-source voltage is limited to -20 V and continuous drain current is -9 A at VGS=-4.5 V (TA=25°C). |
| 8 | D1,D2 | passive | Drain terminal shared by the two MOSFETs in the package group 5-8; the drain-source voltage is limited to -20 V and continuous drain current is -9 A at VGS=-4.5 V (TA=25°C). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS | -20 | | | V | TA=25°C unless otherwise noted | 1 |
| Continuous Drain Current | ID | -9 | | | A | VGS=-4.5V | 1 |
| Continuous Drain Current | ID | -7.1 | | | A | VGS=-4.5V | 1 |
| Pulsed Drain Current | IDM | -71 | | | A | Repetitive rating; pulse width limited by max. junction temperature (note 1) | 1 |
| Maximum Power Dissipation | PD | | | 2 | W | Surface mounted on FR-4 board, t ≤ 10 sec (note 3) | 1 |
| Maximum Power Dissipation | PD | | | 1.3 | W | Surface mounted on FR-4 board, t ≤ 10 sec (note 3) | 1 |
| Linear Derating Factor | | | | 16 | mW/°C | | 1 |
| Gate-to-Source Voltage | VGS | -12 | | 12 | V | | 1 |
| Junction and Storage Temperature Range | TJ, TSTG | -55 | | 150 | °C | | 1 |
| Drain-Source Breakdown Voltage | V(BR)DSS | -20 | | | V | ID=-250µA, VGS=0V | 2 |
| Gate Threshold Voltage | VGS(th) | -0.45 | | -1 | V | VDS=VGS, ID=-250μA | 2 |
| Static Drain-to-Source On-Resistance | RDS(ON) | | | 18 | mΩ | VGS=-4.5V, ID=-9A | 2 |
| Static Drain-to-Source On-Resistance | RDS(ON) | | | 26 | mΩ | VGS=-2.5V, ID=-7.7A | 2 |
| Gate-to-Source Forward Leakage | IGSS | | | -100 | nA | VGS=-12V | 2 |
| Gate-to-Source Reverse Leakage | IGSS | | | 100 | nA | VGS=12V | 2 |
| Drain-to-Source Leakage Current | IDSS | | | -1 | µA | VDS=-16V, VGS=0V | 2 |
| Drain-to-Source Leakage Current | IDSS | | | -25 | µA | VDS=-16V, VGS=0V, TJ=125°C | 2 |
| Total Gate Charge | Qg | | 42 | 63 | nC | ID=-9A, VDS=-16V, VGS=-5V | 2 |
| Gate-to-Source Charge | Qgs | | 7.1 | 11 | nC | ID=-9A, VDS=-16V, VGS=-5V | 2 |
| Gate-to-Drain (Miller) Charge | Qgd | | 12 | 18 | nC | ID=-9A, VDS=-16V, VGS=-5V | 2 |
| Maximum Junction-to-Ambient | RθJA | | | 62.5 | °C/W | Surface mounted on FR-4 board, t ≤ 10 sec (note 3) | 2 |
| Continuous Source Current (Body Diode) | IS | | | -2 | A | | 3 |
| Pulsed Source Current (Body Diode) | ISM | | | -71 | A | Repetitive rating; pulse width limited by max. junction temperature (note 1) | 3 |
| Diode Forward Voltage | VSD | | | -1.2 | V | TJ=25°C, IS=-2A, VGS=0V (note 2) | 3 |
| Reverse Recovery Time | trr | | 180 | 270 | ns | TJ=25°C, IF=-2A, dI/dt=-100A/μs (note 2) | 3 |
| Reverse Recovery Charge | Qrr | | 300 | 450 | nC | TJ=25°C, IF=-2A, dI/dt=-100A/μs (note 2) | 3 |
## CAD (KiCad official)
- Symbol: `IRF7324TR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `irf7324tr-etched.step` / `irf7324tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irf7324tr.step` / `irf7324tr.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755879406399033344) (10 pp, sha256 `0a35b633c264213e`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/irf7324tr-datasheet.pdf)