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Ray Publish 0.1.0 e6590b3 10d ago

IRF730APBF

Vishay Intertech · MOSFETs · TO-220AB

IRF730APBF from Vishay Intertech, in a TO-220AB. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate control input with a maximum gate-source voltage of ±30 V and a gate-source threshold of 2.0 V min to 4.5 V max at VDS = VGS, ID = 250 µA.
2 D passive Drain terminal rated for 400 V drain-source voltage and 5.5 A continuous drain current at TC = 25 °C (22 A pulsed).
3 S passive Source terminal that carries the body diode, rated for 5.5 A continuous source-drain diode current (22 A pulsed).

Key specifications

Parameter Value
Manufacturer Vishay Intertech
Package TO-220AB
Category Triode/MOS Tube/Transistor
Pins 3

CAD (KiCad official)

  • Symbol: IRF730APBF
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220AB (KiCad packages3D, STEP)
  • 3D model files: irf730apbf-etched.step / irf730apbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irf730apbf.step / irf730apbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Vishay Intertech datasheet (7 pp, sha256 324a57e102415f70, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF