component
IRF7304TR
Public Made by Adomby adom
UMW MOSFETs, SOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdownIRF7304TR
UMW · MOSFETs · SOP-8
IRF7304TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of P-channel MOSFET 1, the reference for the gate-to-source rating VGS of ±12 V. |
| 2 | G1 | input | Gate of P-channel MOSFET 1; gate-to-source voltage is rated ±12 V (VGS), per the absolute maximum table. |
| 3 | S2 | passive | Source terminal of P-channel MOSFET 2, the reference for the gate-to-source rating VGS of ±12 V. |
| 4 | G2 | input | Gate of P-channel MOSFET 2; gate-to-source voltage is rated ±12 V (VGS), per the absolute maximum table. |
| 5 | D1,D2 | passive | Drain terminal of the dual P-channel MOSFET; drain-to-source voltage is -20 V (VDS) and continuous drain current is -4.7 A at TA=25°C. |
| 6 | D1,D2 | passive | Drain terminal of the dual P-channel MOSFET; drain-to-source voltage is -20 V (VDS) and continuous drain current is -4.7 A at TA=25°C. |
| 7 | D1,D2 | passive | Drain terminal of the dual P-channel MOSFET; drain-to-source voltage is -20 V (VDS) and continuous drain current is -4.7 A at TA=25°C. |
| 8 | D1,D2 | passive | Drain terminal of the dual P-channel MOSFET; drain-to-source voltage is -20 V (VDS) and continuous drain current is -4.7 A at TA=25°C. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Breakdown Voltage | V(BR)DSS | -20 | V | ID=-250µA, VGS=0V | 3 | ||
| Gate Threshold Voltage | VGS(th) | -0.7 | -1 | V | VDS=VGS, ID=-250μA | 3 | |
| Forward Transconductance | gFS | 4 | S | VDS=-16V, ID=-2.2A | 3 | ||
| Static Drain-to-Source On-Resistance (VGS=-4.5V) | RDS(ON) | 90 | mΩ | VGS=-4.5V, ID=-2.2A | 3 | ||
| Static Drain-to-Source On-Resistance (VGS=-2.7V) | RDS(ON) | 140 | mΩ | VGS=-2.7V, ID=-1.8A | 3 | ||
| Gate-to-Source Reverse Leakage | IGSS | -100 | nA | VGS=-12V | 3 | ||
| Gate-to-Source Forward Leakage | IGSS | 100 | nA | VGS=12V | 3 | ||
| Drain-to-Source Leakage Current | IDSS | -1 | µA | VDS=-16V, VGS=0V | 3 | ||
| Drain-to-Source Leakage Current (TJ=125°C) | IDSS | -25 | µA | VDS=-16V, VGS=0V, TJ=125°C | 3 | ||
| Gate-to-Source Voltage | VGS | -12 | 12 | V | 2 | ||
| Peak Diode Recovery dv/dt | dv/dt | -5 | V/nS | 2 | |||
| Junction and Storage Temperature Range | TJ, TSTG | -55 | 150 | °C | 2 | ||
| Continuous Drain Current (10 s pulsed) | ID | -4.7 | A | 10 Sec. Pulsed Drain Current, VGS=-4.5V | 1 | ||
| Continuous Drain Current | ID | -4.3 | A | VGS=-4.5V, TA=25°C | 1 | ||
| Continuous Drain Current | ID | -3.4 | A | VGS=-4.5V, TA=70°C | 1 | ||
| Pulsed Drain Current | IDM | -17 | A | Repetitive rating; pulse width limited by max. junction temperature (see fig.11) | 1 | ||
| Power Dissipation | PD | 2 | W | TA=25°C | 1 | ||
| Maximum Junction-to-Ambient | RθJA | 62.5 | °C/W | 2 |
CAD (KiCad official)
- Symbol:
IRF7304TR - Footprint:
Package_SO:SOIC-8_3.9x4.9mm_P1.27mm - 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files:
irf7304tr-etched.step/irf7304tr-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);irf7304tr.step/irf7304tr.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: UMW datasheet (11 pp, sha256
344ae69b9e980cf3, retrieved 2026-10-21, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).