# IRF7301TR

**UMW** · MOSFETs · SOP-8

IRF7301TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S1 | passive | Source terminal of MOSFET 1 (S1 in the datasheet pinning table); the datasheet gives no separate pin-level limit, so the absolute maximum ratings on page 2 apply. |
| 2 | G1 | input | Gate terminal of MOSFET 1; gate-to-source voltage is rated at VGS = ±12V. |
| 3 | S2 | passive | Source terminal of MOSFET 2 (S2 in the datasheet pinning table); the datasheet gives no separate pin-level limit, so the absolute maximum ratings on page 2 apply. |
| 4 | G2 | input | Gate terminal of MOSFET 2; gate-to-source voltage is rated at VGS = ±12V. |
| 5 | D1 | passive | Drain terminal (DRAIN, grouped as D1,D2 with pins 6-8 in the datasheet pinning table); drain-to-source voltage is rated at VDS = 20V. |
| 6 | D1 | passive | Drain terminal (DRAIN, grouped as D1,D2 with pins 5, 7, 8 in the datasheet pinning table); drain-to-source voltage is rated at VDS = 20V. |
| 7 | D2 | passive | Drain terminal (DRAIN, grouped as D1,D2 with pins 5, 6, 8 in the datasheet pinning table); drain-to-source voltage is rated at VDS = 20V. |
| 8 | D2 | passive | Drain terminal (DRAIN, grouped as D1,D2 with pins 5-7 in the datasheet pinning table); drain-to-source voltage is rated at VDS = 20V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain current, 10 s pulsed, VGS=4.5V (absolute maximum) | ID |  |  | 5.7 | A | VGS=4.5V, TA=25°C, 10 sec pulsed | 1 |
| Continuous drain current, VGS=4.5V (absolute maximum) | ID |  |  | 5.2 | A | VGS=4.5V, TA=25°C | 1 |
| Continuous drain current, VGS=4.5V (absolute maximum) | ID |  |  | 4.1 | A | VGS=4.5V, TA=70°C | 1 |
| Pulsed drain current (absolute maximum) | IDM |  |  | 21 | A | TA=25°C | 1 |
| Power dissipation (absolute maximum) | PD |  |  | 2 | W | TA=25°C | 1 |
| Gate-to-source voltage (absolute maximum) | VGS | -12 |  | 12 | V |  | 2 |
| Peak diode recovery dv/dt (absolute maximum) | dv/dt |  |  | 5 | V/nS |  | 2 |
| Junction and storage temperature range (absolute maximum) | TJ, TSTG | -55 |  | 150 | °C |  | 2 |
| Maximum junction-to-ambient thermal resistance | R |  |  | 62.5 | °C/W | Maximum junction-to-ambient | 2 |
| Drain-source breakdown voltage | V(BR)DSS | 20 |  |  | V | ID=250µA, VGS=0V | 3 |
| Gate threshold voltage | VGS(th) | 0.7 |  | 2.2 | V | VDS=VGS, ID | 3 |
| Drain-to-source leakage current | IDSS |  |  | 1 | µA | VDS=16V, VGS=0V | 3 |
| Drain-to-source leakage current, TJ=125°C | IDSS |  |  | 25 | µA | VDS=16V, VGS=0V, TJ=125°C | 3 |
| Gate-to-source forward leakage | IGSS |  |  | 100 | nA | VGS=12V | 3 |
| Gate-to-source reverse leakage | IGSS | -100 |  |  | nA | VGS=-12V | 3 |
| Static drain-to-source on-resistance | RDS(ON) |  |  | 40 | mΩ | VGS=4.5V, ID=2.6A | 3 |
| Static drain-to-source on-resistance | RDS(ON) |  |  | 50 | mΩ | VGS=2.7V, ID=2.2A | 3 |
| Continuous source current (body diode) | IS |  |  | 2.5 | A |  | 4 |
| Pulsed source current (body diode) | ISM |  |  | 21 | A |  | 4 |
| Diode forward voltage | VSD |  |  | 1 | V | TJ=25°C, IS=1.8A, VGS=0V | 4 |
| Reverse recovery time | trr |  | 29 | 44 | ns | TJ=25°C, IF=2.6A | 4 |
| Reverse recovery charge | Qrr |  | 22 | 33 | nC | TJ=25°C, IF=2.6A | 4 |

## CAD (KiCad official)

- Symbol: `IRF7301TR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `irf7301tr-etched.step` / `irf7301tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irf7301tr.step` / `irf7301tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755879258353225728) (11 pp, sha256 `3da063414fa16628`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/irf7301tr-datasheet.pdf)