# IRF7240TR

**UMW** · MOSFETs · SOP-8

IRF7240TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | S | passive | Source terminal of the -40 V P-channel MOSFET; the body diode is rated -2.5 A continuous (IS) per the source-drain ratings. |
| 2 | S | passive | Source terminal of the -40 V P-channel MOSFET; the body diode is rated -2.5 A continuous (IS) per the source-drain ratings. |
| 3 | S | passive | Source terminal of the -40 V P-channel MOSFET; the body diode is rated -2.5 A continuous (IS) per the source-drain ratings. |
| 4 | G | input | Gate terminal; the datasheet limits gate-to-source voltage VGS to ±20 V. |
| 5 | D | passive | Drain terminal; VDS is rated -40 V and continuous drain current is -10.5 A at VGS = -10 V, TA = 25°C. |
| 6 | D | passive | Drain terminal; VDS is rated -40 V and continuous drain current is -10.5 A at VGS = -10 V, TA = 25°C. |
| 7 | D | passive | Drain terminal; VDS is rated -40 V and continuous drain current is -10.5 A at VGS = -10 V, TA = 25°C. |
| 8 | D | passive | Drain terminal; VDS is rated -40 V and continuous drain current is -10.5 A at VGS = -10 V, TA = 25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | UMW |
| Package | SOP-8 |
| Category | Transistors/Thyristors |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS |  |  | -40 | V |  | 1 |
| Continuous Drain Current | ID |  |  | -10.5 | A | VGS=-10V, TA=25°C | 1 |
| Continuous Drain Current | ID |  |  | -8.6 | A | VGS=-10V, TA=70°C | 1 |
| Pulsed Drain Current | IDM |  |  | -43 | A |  | 1 |
| Power Dissipation | PD |  |  | 2.5 | W | TA=25°C | 1 |
| Power Dissipation | PD |  |  | 1.6 | W | TA=70°C | 1 |
| Gate-to-Source Voltage | VGS | -20 |  | 20 | V |  | 1 |
| Junction and Storage Temperature Range | TJ, TSTG | -55 |  | 150 | °C |  | 1 |
| Maximum Junction-to-Ambient | RθJA |  |  | 50 | °C/W | Surface mounted on 1 in square Cu board, t ≤ 5 sec | 2 |
| Drain-Source Breakdown Voltage | V(BR)DSS | -40 |  |  | V | ID=-250µA, VGS=0V | 3 |
| Gate Threshold Voltage | VGS(th) | -1 |  | -3 | V | VDS=VGS, ID=-250μA | 3 |
| Static Drain-to-Source On-Resistance | RDS(ON) |  |  | 16 | mΩ | VGS=-10V, ID=-10.5A | 3 |
| Static Drain-to-Source On-Resistance | RDS(ON) |  |  | 27 | mΩ | VGS=-4.5V, ID=-8.4A | 3 |
| Gate-to-Source Forward Leakage | IGSS |  |  | -100 | nA | VGS=-20V | 3 |
| Gate-to-Source Reverse Leakage | IGSS |  |  | 100 | nA | VGS=20V | 3 |
| Continuous Source Current (Body Diode) | IS |  |  | -2.5 | A |  | 4 |
| Pulsed Source Current (Body Diode) | ISM |  |  | -43 | A |  | 4 |

## CAD (KiCad official)

- Symbol: `IRF7240TR`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOP-8 (KiCad packages3D, STEP)
- 3D model files: `irf7240tr-etched.step` / `irf7240tr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `irf7240tr.step` / `irf7240tr.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [UMW datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8755879290158227456) (12 pp, sha256 `fc600bc8c2d8a96c`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/irf7240tr-datasheet.pdf)