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Ray Publish 0.1.0 0e8fe04 17d ago

IRF7201TR

UMW · MOSFETs · SOP-8

IRF7201TR from UMW, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 S passive Source of the N-channel MOSFET, tied to source pins 2 and 3 in the package drawing.
2 S passive Source of the N-channel MOSFET, tied to source pins 1 and 3 in the package drawing.
3 S passive Source of the N-channel MOSFET, tied to source pins 1 and 2 in the package drawing.
4 G input Gate of the N-channel MOSFET; VGS maximum is ±20 V and the gate threshold is 1.0 V minimum.
5 D passive Drain of the MOSFET, tied to drain pins 6, 7 and 8; VDS maximum is 30 V.
6 D passive Drain of the MOSFET, tied to drain pins 5, 7 and 8; continuous drain current is 7.3 A at 25°C.
7 D passive Drain of the MOSFET, tied to drain pins 5, 6 and 8; pulsed drain current is 58 A.
8 D passive Drain of the MOSFET, tied to drain pins 5, 6 and 7; VDS maximum is 30 V.

Key specifications

Parameter Value
Manufacturer UMW
Package SOP-8
Category Transistors/Thyristors
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain-Source Voltage VDS 30 V 1
Continuous Drain Current ID 7.3 A TC = 25°C, VGS @ 10V 1
Continuous Drain Current ID 5.8 A TC = 70°C, VGS @ 10V 1
Pulsed Drain Current IDM 58 A 1
Power Dissipation PD 2.5 W TC = 25°C 1
Power Dissipation PD 1.6 W TC = 70°C 1
Linear Derating Factor 0.02 W/°C 1
Gate-to-Source Voltage VGS -20 20 V 1
Gate-to-Source Voltage Single Pulse VGSM 30 V tp<10µs 1
Single Pulse Avalanche Energy EAS 70 mJ 1
Peak Diode Recovery dv/dt dv/dt 5 V/ns 1
Junction and Storage Temperature Range TJ, TSTG -55 150 °C 1
Maximum Junction-to-Ambient Thermal Resistance RθJA 50 °C/W 1
Drain-to-Source Breakdown Voltage V(BR)DSS 30 V VGS = 0V, ID = 250µA 2
Static Drain-to-Source On-Resistance RDS(on) 30 mΩ VGS = 10V, ID = 7.3A 2
Static Drain-to-Source On-Resistance RDS(on) 50 mΩ VGS = 4.5V, ID = 3.7A 2
Gate Threshold Voltage VGS(th) 1 V VDS = VGS, ID = 250µA 2
Forward Transconductance gfs 5.8 S VDS = 15V, ID = 2.3A 2
Drain-to-Source Leakage Current IDSS 1 VDS = 24V, VGS = 0V 2
Drain-to-Source Leakage Current IDSS 25 VDS = 24V, VGS = 0V, TJ = 125°C 2
Gate-to-Source Forward Leakage IGSS -100 VGS = -20V 2
Gate-to-Source Reverse Leakage IGSS 100 VGS = 20V 2
Total Gate Charge Qg 19 28 nC ID = 4.6A 2
Gate-to-Source Charge Qgs 2.3 3.5 nC VDS = 24V 2
Gate-to-Drain (Miller) Charge Qgd 6.3 9.5 nC VGS = 10V, See Fig. 10 2
Diode Forward Voltage VSD 1.2 V TJ = 25°C, IS = 4.6A, VGS = 0V 2
Reverse Recovery Time trr 48 73 ns TJ = 25°C, IF = 4.6A 2
Reverse Recovery Charge Qrr 73 110 nC di/dt = 100A/µs 2
Continuous Source Current (Body Diode) IS 2.5 A 2
Pulsed Source Current (Body Diode) ISM 58 A 2

CAD (KiCad official)

  • Symbol: IRF7201TR
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOP-8 (KiCad packages3D, STEP)
  • 3D model files: irf7201tr-etched.step / irf7201tr-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irf7201tr.step / irf7201tr.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: UMW datasheet (7 pp, sha256 823800fca7a84cf9, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF