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IRF40R207

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Infineon Technologies MOSFETs, TO-252. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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IRF40R207

Infineon Technologies · MOSFETs · TO-252

IRF40R207 from Infineon Technologies, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-to-source voltage is rated at ±20 V maximum, with a typical threshold of 3.0 V (2.2 V min, 3.9 V max).
2 D passive Drain, also connected to the D-Pak tab; drain-to-source breakdown is 40 V minimum, and continuous current is 90 A silicon limited and 56 A wire-bond limited at TC = 25°C.
3 S passive Source; the pulsed drain current limit of 337 A (224 A limit from source bonding technology) and body-diode continuous current of 90 A flow through this pin.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-252
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Continuous Drain Current (Silicon Limited) ID 90 A TC = 25°C, VGS @ 10V (Silicon Limited) 2
Continuous Drain Current (Silicon Limited) ID 64 A TC = 100°C, VGS @ 10V (Silicon Limited) 2
Continuous Drain Current (Wire Bond Limited) ID 56 A TC = 25°C, VGS @ 10V (Wire Bond Limited) 2
Pulsed Drain Current IDM 337 A 2
Maximum Power Dissipation PD 83 W TC = 25°C 2
Linear Derating Factor 0.56 W/°C 2
Gate-to-Source Voltage VGS -20 20 V 2
Operating Junction and Storage Temperature Range TJ, TSTG -55 175 °C 2
Soldering Temperature 300 for 10 seconds (1.6mm from case) 2
Single Pulse Avalanche Energy (Thermally limited) EAS 86 mJ 2
Single Pulse Avalanche Energy (Thermally limited) EAS 165 mJ 2
Junction-to-Case Thermal Resistance RJC 1.8 °C/W 2
Junction-to-Ambient Thermal Resistance (PCB Mounted) RCS 50 °C/W 2
Junction-to-Ambient Thermal Resistance RJA 110 °C/W 2
Drain-to-Source Breakdown Voltage V(BR)DSS 40 V VGS = 0V, ID = 250µA 2
Static Drain-to-Source On-Resistance RDS(on) 4.2 5.1 m VGS = 10V, ID = 55A 2
Gate Threshold Voltage VGS(th) 2.2 3 3.9 V VDS = VGS, ID = 50µA 2
Drain-to-Source Leakage Current IDSS 1 µA VDS = 40 V, VGS = 0V 2
Drain-to-Source Leakage Current IDSS 150 µA VDS = 40V, VGS = 0V, TJ = 125°C 2
Gate-to-Source Forward Leakage IGSS 100 nA VGS = 20V 2
Gate-to-Source Reverse Leakage IGSS -100 nA VGS = -20V 2
Forward Transconductance gfs 170 S VDS = 10V, ID = 55A 3
Total Gate Charge Qg 45 68 nC ID = 55A 3
Continuous Source Current (Body Diode) IS 90 A 3
Pulsed Source Current (Body Diode) ISM 337 A 3
Diode Forward Voltage VSD 0.9 1.3 V TJ = 25°C, IS = 55A, VGS = 0V 3

CAD (KiCad official)

  • Symbol: IRF40R207
  • Footprint: Package_TO_SOT_SMD:TO-252-2
  • 3D model: TO-252 (KiCad packages3D, STEP)
  • 3D model files: irf40r207-etched.step / irf40r207-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); irf40r207.step / irf40r207.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (12 pp, sha256 2235af7fa9c0db61, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF