# IR2301STRPBF

**Infineon Technologies** · Gate Drivers · SOIC-8

IR2301STRPBF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low side and logic fixed supply, recommended 5 V to 20 V, absolute maximum -0.3 V to 25 V referenced to COM. |
| 2 | HIN | input | Logic input for the high side gate driver output (HO), in phase, with VIN limited to COM-0.3 V to VCC+0.3 V and logic '1' threshold of at least 2.9 V and logic '0' threshold of at most 0.8 V. |
| 3 | LIN | input | Logic input for the low side gate driver output (LO), in phase, with VIN limited to COM-0.3 V to VCC+0.3 V and logic '1' threshold of at least 2.9 V and logic '0' threshold of at most 0.8 V. |
| 4 | COM | power_in | Low side return and reference for all voltage parameters, logic inputs and outputs LO and HO. |
| 5 | LO | output | Low side gate drive output, operating between 0 V and VCC. |
| 6 | VS | power_in | High side floating supply return, with offset VS rated up to 600 V (logic operational for VS of -5 V to +600 V) and VS held within VB-25 V to VB+0.3 V. |
| 7 | HO | output | High side gate drive output, with VHO limited to VS-0.3 V to VB+0.3 V. |
| 8 | VB | power_in | High side floating supply, recommended VS+5 V to VS+20 V, with absolute maximum of 625 V referenced to COM. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High side floating absolute voltage | VB | -0.3 |  | 625 | V |  | 2 |
| Low side output voltage (absolute) | VLO | -0.3 |  |  | V |  | 2 |
| Low side and logic fixed supply voltage (absolute) | VCC | -0.3 |  | 25 | V |  | 2 |
| Allowable offset supply voltage transient | dVS/dt |  |  | 50 | V/ns |  | 2 |
| Package power dissipation (8 lead SOIC) | PD |  |  | 0.625 | W | TA ≤ +25°C | 2 |
| Thermal resistance, junction to ambient (8 lead SOIC) | RthJA |  |  | 200 | °C/W |  | 2 |
| Junction temperature | TJ |  |  | 150 | °C |  | 2 |
| Storage temperature | TS | -50 |  | 150 | °C |  | 2 |
| Lead temperature (soldering, 10 seconds) | TL |  |  | 300 | °C |  | 2 |
| High side floating supply offset voltage (recommended) | VS |  |  | 600 | V | Note 1 (logic operational for VS of -5 to +600V) | 2 |
| Low side and logic fixed supply voltage (recommended) | VCC | 5 |  | 20 | V |  | 2 |
| Low side output voltage (recommended) | VLO | 0 |  |  | V |  | 2 |
| Ambient temperature | TA | -40 |  | 150 | °C |  | 2 |
| Logic 1 input voltage | VIH | 2.9 |  |  | V | VCC = 10V to 20V | 3 |
| Logic 0 input voltage | VIL |  |  | 0.8 | V | VCC = 10V to 20V | 3 |
| High level output voltage, VBIAS - VO | VOH |  | 0.8 | 1.4 | V | IO = 20 mA | 3 |
| Low level output voltage, VO | VOL |  | 0.3 | 0.6 | V | IO = 20 mA | 3 |
| Offset supply leakage current | ILK |  |  | 50 | µA | VB = VS = 600V | 3 |
| Quiescent VBS supply current | IQBS | 20 | 60 | 100 | µA | VIN = 0V or 5V | 3 |
| Quiescent VCC supply current | IQCC | 50 | 120 | 190 | µA | VIN = 0V or 5V | 3 |
| Logic 1 input bias current | IIN+ |  | 5 | 20 | µA | VIN = 5V | 3 |
| Logic 0 input bias current | IIN- |  |  | 2 | µA | VIN = 0V | 3 |
| VCC and VBS supply undervoltage positive going threshold | VCCUV+ / VBSUV+ | 3.3 | 4.1 | 5 | V |  | 3 |
| VCC and VBS supply undervoltage negative going threshold | VCCUV- / VBSUV- | 3 | 3.8 | 4.7 | V |  | 3 |
| VCC and VBS undervoltage hysteresis | VCCUVH / VBSUVH | 0.1 | 0.3 |  | V |  | 3 |
| Output high short circuit pulsed current | IO+ | 120 | 200 |  | mA | VO = 0V, PW ≤ 10 µs | 3 |
| Output low short circuit pulsed current | IO- | 250 | 350 |  | mA | VO = 15V, PW ≤ 10 µs | 3 |
| Turn-on propagation delay | ton |  | 220 | 300 | ns | VBIAS = 15V, CL = 1000 pF, TA = 25°C; VS = 0V | 3 |
| Turn-off propagation delay | toff |  | 200 | 280 | ns | VBIAS = 15V, CL = 1000 pF, TA = 25°C; VS = 0V or 600V | 3 |
| Delay matching, HS & LS turn-on/off | MT |  | 0 | 50 | ns | VBIAS = 15V, CL = 1000 pF, TA = 25°C | 3 |
| Turn-on rise time | tr |  | 130 | 220 | ns | VBIAS = 15V, CL = 1000 pF, TA = 25°C; VS = 0V | 3 |
| Turn-off fall time | tf |  | 50 | 80 | ns | VBIAS = 15V, CL = 1000 pF, TA = 25°C; VS = 0V | 3 |

## CAD (KiCad official)

- Symbol: `IR2301STRPBF`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ir2301strpbf-etched.step` / `ir2301strpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ir2301strpbf.step` / `ir2301strpbf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588884226511155200) (18 pp, sha256 `877262b95811a15d`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ir2301strpbf-datasheet.pdf)