component
IR2301PBF
Public Made by Adomby adom
Infineon Technologies Gate Drive ICs, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
Open in new tab ↗
Loads when you scroll to it. Unloads after 5 minutes in the background.
Symbol & Footprint
Schematic Symbol
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
PCB Footprint
Open full view ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
Datasheet
Open in new tab ↗Loads when you scroll to it. Unloads after 5 minutes in the background.
README
markdownIR2301PBF
Infineon Technologies · Gate Drive ICs · PDIP-8
IR2301PBF from Infineon Technologies, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low side and logic fixed supply, specified at 5 V to 20 V recommended with an absolute maximum range of -0.3 V to 25 V referenced to COM. |
| 2 | HIN | input | Logic input for the high side gate driver output (HO), in phase with HO, with logic input limits of COM - 0.3 V to VCC + 0.3 V and compatibility with 3.3 V, 5 V and 15 V logic. |
| 3 | LIN | input | Logic input for the low side gate driver output (LO), in phase with LO, with logic input limits of COM - 0.3 V to VCC + 0.3 V and compatibility with 3.3 V, 5 V and 15 V logic. |
| 4 | COM | power_in | Low side return; all voltage parameters of the device are referenced to COM. |
| 5 | LO | output | Low side gate drive output, swinging between 0 V and VCC (recommended), with the datasheet's low-side output current pulse limits of 250 mA minimum sink and 120 mA minimum source at 10 us pulse width. |
| 6 | VS | power_in | High side floating supply return, with recommended offset up to 600 V and absolute offset range of VB - 25 V to VB + 0.3 V. |
| 7 | HO | output | High side gate drive output, referenced to VS and swinging between VS and VB (recommended), with absolute range of VS - 0.3 V to VB + 0.3 V. |
| 8 | VB | power_in | High side floating supply, specified at VS + 5 V to VS + 20 V recommended with an absolute maximum of -0.3 V to 625 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | PDIP-8 |
| Category | Power Management ICs |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic input-side undervoltage / VCC supply | VCC | -0.3 | 25 | V | 2 | ||
| High side floating absolute voltage | VB | -0.3 | 625 | V | 2 | ||
| Low side output voltage | VLO | -0.3 | V | 2 | |||
| Allowable offset supply voltage transient | dVS/dt | 50 | V/ns | 2 | |||
| Package power dissipation (8 lead PDIP) | PD | 1 | W | @ TA ≤ +25°C (8 lead PDIP) | 2 | ||
| Thermal resistance, junction to ambient (8 lead PDIP) | RthJA | 125 | °C/W | 8 lead PDIP | 2 | ||
| Junction temperature | TJ | 150 | °C | 2 | |||
| Storage temperature | TS | -50 | 150 | °C | 2 | ||
| Lead temperature (soldering) | TL | 300 | °C | soldering, 10 seconds | 2 | ||
| High side floating supply offset voltage (recommended) | VS | 600 | V | Note 1 | 2 | ||
| Low side and logic fixed supply voltage (recommended) | VCC | 5 | 20 | V | 2 | ||
| Low side output voltage (recommended) | VLO | 0 | V | 2 | |||
| Ambient temperature | TA | -40 | 150 | °C | 2 | ||
| Turn-on propagation delay | ton | 220 | 300 | ns | VS = 0V | 3 | |
| Turn-off propagation delay | toff | 200 | 280 | ns | VS = 0V or 600V | 3 | |
| Delay matching, HS & LS turn-on/off | MT | 0 | 50 | ns | 3 | ||
| Turn-on rise time | tr | 130 | 220 | ns | VS = 0V | 3 | |
| Turn-off fall time | tf | 50 | 80 | ns | VS = 0V | 3 | |
| Logic '1' input voltage | VIH | 2.9 | V | VCC = 10V to 20V | 3 | ||
| Logic '0' input voltage | VIL | 0.8 | V | VCC = 10V to 20V | 3 | ||
| High level output voltage, VBIAS - VO | VOH | 0.8 | 1.4 | V | IO = 20 mA | 3 | |
| Low level output voltage, VO | VOL | 0.3 | 0.6 | V | IO = 20 mA | 3 | |
| Offset supply leakage current | ILK | 50 | µA | VB = VS = 600V | 3 | ||
| Quiescent VBS supply current | IQBS | 20 | 60 | 100 | µA | VIN = 0V or 5V | 3 |
| Quiescent VCC supply current | IQCC | 50 | 120 | 190 | µA | VIN = 0V or 5V | 3 |
| Logic '1' input bias current | IIN+ | 5 | 20 | µA | VIN = 5V | 3 | |
| Logic '0' input bias current | IIN- | 2 | µA | VIN = 0V | 3 | ||
| VCC and VBS supply undervoltage positive going threshold | VCCUV+/VBSUV+ | 3.3 | 4.1 | 5 | V | 3 | |
| VCC and VBS supply undervoltage negative going threshold | VCCUV-/VBSUV- | 3 | 3.8 | 4.7 | V | 3 | |
| VCC and VBS undervoltage hysteresis | VCCUVH/VBSUVH | 0.1 | 0.3 | V | 3 | ||
| Output high short circuit pulsed current | IO+ | 120 | 200 | mA | VO = 0V, PW ≤ 10 µs | 3 | |
| Output low short circuit pulsed current | IO- | 250 | 350 | mA | VO = 15V, PW ≤ 10 µs | 3 |
CAD (KiCad official)
- Symbol:
IR2301PBF - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files:
ir2301pbf-etched.step/ir2301pbf-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);ir2301pbf.step/ir2301pbf.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Infineon Technologies datasheet (18 pp, sha256
877262b95811a15d, retrieved 2026-10-30, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).