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IR2214SSTRPBF

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Infineon Technologies Gate Drivers, SSOP-24-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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IR2214SSTRPBF

Infineon Technologies · Gate Drivers · SSOP-24-208mil

IR2214SSTRPBF from Infineon Technologies, in a SSOP-24-208mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 HIN input Logic input for the high side gate driver outputs (HOP/HON), 3.3 V compatible, range VSS to VCC.
2 LIN input Logic input for the low side gate driver outputs (LOP/LON), range VSS to VCC.
3 FLT_CLR input Active-high fault clear input that clears a latched fault condition.
4 SY_FLT bidirectional Active-low dual function pin: as an output it indicates an SSD sequence is occurring, as an input an active low signal freezes both output states.
5 FAULT/SD bidirectional Active-low dual function pin: as an output it indicates a fault condition, as an input it shuts down the gate driver outputs regardless of HIN/LIN.
6 VSS power_in Logic ground.
7 SSDL output Low side soft shutdown output used to turn off the low side IGBT softly after desaturation.
8 COM power_in Low side driver return (power ground), recommended range -5 V to 5 V.
9 LON output Low side driver sinking output.
10 LOP output Low side driver sourcing output.
11 VCC power_in Low side and logic fixed supply, recommended 11.5 V to 20 V.
12 DSL input Low side IGBT desaturation protection input.
13 N.C. unconnected No connection.
14 N.C. unconnected No connection.
15 N.C. unconnected No connection.
16 N.C. unconnected No connection.
17 N.C. unconnected No connection.
18 SSDH output High side soft shutdown output used to turn off the high side IGBT softly after desaturation.
19 VS power_in High side floating supply return, offset up to 600 V (IR2114) or 1200 V (IR2214).
20 HON output High side driver sinking output.
21 HOP output High side driver sourcing output.
22 N.C. unconnected No connection.
23 VB power_in High side gate driver floating supply, recommended VS + 11.5 V to VS + 20 V.
24 DSH input High side IGBT desaturation protection input.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SSOP-24-208mil
Category Motor Driver ICs
Pins 24

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VB High side floating supply voltage VB 11.5 20 V Referenced to VS: min VS + 11.5 V, max VS + 20 V 2
VS High side floating supply offset voltage (IR2214) VS 1200 V IR2214 column; min printed as VSS 2
VHO High side output voltage (HOP, HON and SSDH) VHO 20 V Referenced to VS: min VS, max VS + 20 V 2
VCC Low side and logic fixed supply voltage VCC 11.5 20 V Note 1 2
COM Power ground COM -5 5 V 2
VDSH High side DS pin input voltage VDSH -2 V Referenced to VS: min VS - 2.0 V; max VB 2
VDSL Low side DS pin input voltage VDSL -2 V Referenced to COM: min VCOM - 2.0 V; max VCC 2
High side pulse width for HIN input tPWHIN 1 µs 2
Ambient temperature TA -40 125 °C 2
VB High side floating supply voltage (IR2214) VB -0.3 1225 V IR2214 column; referenced to VSS 2
VS High side offset voltage VS -25 0.3 V Referenced to VB: min VB - 25 V, max VB + 0.3 V 2
VHO High side floating output voltage (HOP, HON and SSDH) VHO -0.3 0.3 V min VS - 0.3 V; max VB + 0.3 V 2
VCC Low side and logic fixed supply voltage VCC -0.3 25 V 2
COM Power ground COM -25 0.3 V min VCC - 25 V; max VCC + 0.3 V 2
VLO Low side output voltage (LOP, LON and SSDL) VLO -0.3 0.3 V min VCOM - 0.3 V; max VCC + 0.3 V 2
VIN Logic input voltage (HIN, LIN and FLT_CLR) VIN -0.3 0.3 V max VCC + 0.3 V 2
VFLT Fault input/output voltage (FAULT/SD and SY_FLT) VFLT -0.3 0.3 V max VCC + 0.3 V 2
VDSH High side DS input voltage VDSH -3 0.3 V min VS - 3 V; max VB + 0.3 V 2
VDSL Low side DS input voltage VDSL -3 0.3 V min VCOM - 3 V; max VCC + 0.3 V 2
Allowable offset voltage slew rate dVs/dt 50 V/ns 2
Package power dissipation @ TA ≤ 25 °C PD 1.5 W TA ≤ 25 °C 2
Thermal resistance, junction to ambient RthJA 65 °C/W 2
Junction temperature TJ 150 °C 2
Storage temperature TS -55 150 °C 2
Lead temperature (soldering) TL 300 °C Soldering, 10 seconds 2
VCC supply undervoltage positive going threshold VCCUV+ 9.3 10.2 11.4 V 3
VCC supply undervoltage negative going threshold VCCUV- 8.7 9.3 10.3 V 3
(VB-VS) supply undervoltage positive going threshold VBSUV+ 9.3 10.2 11.4 V VS = 0 V, VS = 600 V or 1200 V 3
(VB-VS) supply undervoltage negative going threshold VBSUV- 8.7 9.3 10.3 V VS = 0 V, VS = 600 V or 1200 V 3
Offset supply leakage current ILK 50 µA VB = VS = 600 V or 1200 V 3
Quiescent VBS supply current IQBS 400 800 µA VIN = 0 V or 3.3 V 3
Quiescent VCC supply current IQCC 0.7 2.5 mA no load 3
Logic "1" input voltage VIH 2 V VCC = VCCUV- to 20 V 3
Logic "0" input voltage VIL 0.8 V VCC = VCCUV- to 20 V 3
Logic input hysteresis VIHSS 0.2 0.4 V VCC = VCCUV- to 20 V 3
Logic "0" input bias current (FAULT/SD, SY_FLT) IIN+ 0 1 µA VIN = 3.3 V 3
Logic "1" input bias current (FAULT/SD, SY_FLT) IIN- -1 0 µA VIN = 0 V 3
High desat input threshold voltage VDESAT+ 7.2 8 8.8 V See Figs. 4,16 3
Low desat input threshold voltage VDESAT- 6.3 7 7.7 V See Figs. 4,16 3
High level output voltage, VB, VHOP or VCC, VLOP VOH 40 300 mV IO= 20 mA 4
Output high first stage short circuit pulsed current IO1+ 1 2 A VHOP/LOP= 0 V, HIN or LIN = 1, PW≤ 200 ns, resistive load, see Fig. 8 4
Output high second stage short circuit pulsed current IO2+ 0.5 1 A VHOP/LOP= 0 V, HIN or LIN= 1, 400 ns ≤PW≤ 10 µs, resistive load, see Fig. 8 4
Low level output voltage, VHON or VLON VOL 45 300 mV IO= 20 mA 4
Output low short circuit pulsed current IO- 1.5 3 A VHOP/LOP = 15 V, HIN or LIN = 0, PW≤ 10 µs 4
Turn on propagation delay ton 220 440 660 ns VIN = 0 & 1, VS = 0 V to 600 V or 1200 V, HOP shorted to HON, LOP shorted to LON, Fig. 7 5
Turn off propagation delay toff 220 440 660 ns VIN = 0 & 1, VS = 0 V to 600 V or 1200 V, HOP shorted to HON, LOP shorted to LON, Fig. 7 5
Turn on first stage duration time ton1 120 200 280 ns Fig. 8 5
DSH to HO soft shutdown propagation delay at HO turn on tDESAT1 2000 3300 4600 ns VHIN= 1 V 5
DSH to HO soft shutdown propagation delay after blanking tDESAT2 1050 ns VDESAT = 15 V, Fig. 10 5
DSL to LO soft shutdown propagation delay at LO turn on tDESAT3 2000 3300 4600 ns VLIN = 1 V 5
DSL to LO soft shutdown propagation delay after blanking tDESAT4 1050 ns VDESAT = 15 V, Fig. 10 5
Soft shutdown minimum pulse width of desat tDS 1000 ns Fig. 9 5
Soft shutdown duration period tSS 5700 9250 13500 ns VDS=15 V, Fig. 9 5
DSH to SY_FLT propagation delay after blanking tSY_FLT,DESAT2 1300 ns VDS = 15 V, Fig. 10 5
DSL to SY_FLT propagation delay after blanking tSY_FLT,DESAT4 1050 ns VDESAT=15 V, Fig. 10 5
Deadtime matching, MDT=DTH-DTL MDT 75 ns External DT = 0 s, Fig. 11 5
Propagation delay matching, Max (ton, toff), Min (ton, toff) PDM 75 ns External DT > 500 ns, Fig. 7 5
VCC supply undervoltage lockout hysteresis VCCUVH 0.9 V 3
Desat input voltage hysteresis VDSTH 1 V See Figs. 4,16 3
FAULT/SD open drain resistance RON,FLT 60 Ω PW≤ 7 µs 3

CAD (KiCad official)

  • Symbol: IR2214SSTRPBF
  • Footprint: Package_SO:SSOP-24_5.3x8.2mm_P0.65mm
  • 3D model: SSOP-24-208mil (KiCad packages3D, STEP)
  • 3D model files: ir2214sstrpbf-etched.step / ir2214sstrpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir2214sstrpbf.step / ir2214sstrpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (33 pp, sha256 c6f632f08c6b189b, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF