# IR2183PBF

**Infineon Technologies** · Gate Drive ICs · PDIP-8

IR2183PBF from Infineon Technologies, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | HIN | input | Logic input for the high side gate driver output (HO), in phase, referenced to COM; recommended input range is COM to COM+4 V and the pin is internally clamped with a 5.2 V zener. |
| 2 | LIN | input | Logic input for the low side gate driver output (LO), out of phase, referenced to COM; recommended input range is COM to COM+4 V and the pin is internally clamped with a 5.2 V zener. |
| 3 | COM | power_in | Low side return and reference for the logic inputs and the LO output; the logic input and output ratings are referenced to this pin. |
| 4 | LO | output | Low side gate driver output, swinging between COM and VCC, with 1.4 A min. source and 1.8 A min. sink pulsed current (PW ≤ 10 µs). |
| 5 | VCC | power_in | Low side and logic fixed supply, recommended 10 V to 20 V, with an absolute maximum of -0.3 V to 25 V. |
| 6 | VS | power_in | High side floating supply return; offset is rated for -5 V to +600 V (logic operational), and the dVS/dt transient is limited to 50 V/ns. |
| 7 | HO | output | High side gate driver output, swinging between VS and VB, with 1.4 A min. source and 1.8 A min. sink pulsed current (PW ≤ 10 µs). |
| 8 | VB | power_in | High side floating supply, recommended VS + 10 V to VS + 20 V, with an absolute maximum of 625 V referenced to COM. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | PDIP-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Logic input voltage HIN/LIN, logic high (VIH) | VIH | 2.7 |  |  | V | VCC = 10V to 20V | 3 |
| Logic input voltage, logic low (VIL) | VIL |  |  | 0.8 | V | VCC = 10V to 20V | 3 |
| High level output voltage, VBIAS - VO | VOH |  |  | 1.2 | V | IO = 0A | 3 |
| Low level output voltage | VOL |  |  | 0.1 | V | IO = 0A | 3 |
| Offset supply leakage current | ILK |  |  | 50 | µA | VB = VS = 600V | 3 |
| Quiescent VBS supply current | IQBS | 20 | 60 | 150 | µA | VIN = 0V or 5V | 3 |
| Quiescent VCC supply current | IQCC | 0.4 | 1 | 1.6 | mA | VIN = 0V or 5V | 3 |
| Logic 1 input bias current | IIN+ |  | 25 | 60 | µA | HIN = 5V, LIN = 0V | 3 |
| Logic 0 input bias current | IIN- |  |  | 1 | µA | HIN = 0V, LIN = 5V | 3 |
| VCC supply undervoltage positive going threshold | VCCUV+ | 8 | 8.9 | 9.8 | V |  | 3 |
| VBS supply undervoltage positive going threshold | VBSUV+ | 8 | 8.9 | 9.8 | V |  | 3 |
| VCC supply undervoltage negative going threshold | VCCUV- | 7.4 | 8.2 | 9 | V |  | 3 |
| VBS supply undervoltage negative going threshold | VBSUV- | 7.4 | 8.2 | 9 | V |  | 3 |
| VCC undervoltage hysteresis | VCCUVH | 0.3 | 0.7 |  | V |  | 3 |
| VBS undervoltage hysteresis | VBSUVH | 0.3 | 0.7 |  | V |  | 3 |
| Output high short circuit pulsed current | IO+ | 1.4 | 1.9 |  | A | VO = 0V, PW ≤ 10 µs | 3 |
| Output low short circuit pulsed current | IO- | 1.8 | 2.3 |  | A | VO = 15V, PW ≤ 10 µs | 3 |
| Turn-on propagation delay | ton |  | 180 | 270 | ns | VS = 0V | 3 |
| Turn-off propagation delay | toff |  | 220 | 330 | ns | VS = 0V or 600V | 3 |
| Delay matching /ton - toff/ | MT |  | 0 | 35 | ns |  | 3 |
| Turn-on rise time | tr |  | 40 | 60 | ns | VS = 0V | 3 |
| Turn-off fall time | tf |  | 20 | 35 | ns | VS = 0V | 3 |
| High side floating absolute voltage | VB | -0.3 |  | 625 | V |  | 2 |
| Low side and logic fixed supply voltage | VCC | -0.3 |  | 25 | V |  | 2 |
| Allowable offset supply voltage transient | dVS/dt |  |  | 50 | V/ns |  | 2 |
| Package power dissipation (8-lead PDIP) | PD |  |  | 1 | W | TA ≤ +25°C | 2 |
| Junction temperature | TJ |  |  | 150 | °C |  | 2 |
| Storage temperature | TS | -50 |  | 150 | °C |  | 2 |
| Lead temperature (soldering) | TL |  |  | 300 | °C | 10 seconds | 2 |
| Thermal resistance, junction to ambient (8-lead PDIP) | RthJA |  |  | 125 | °C/W | Board mounted, still air | 2 |
| Low side and logic fixed supply voltage (recommended) | VCC | 10 |  | 20 | V |  | 2 |
| High side floating supply offset voltage (recommended) | VS |  |  | 600 | V | Note 1: logic operational for VS of -5 to +600V | 2 |
| Ambient temperature | TA | -40 |  | 125 | °C |  | 2 |

## CAD (KiCad official)

- Symbol: `IR2183PBF`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files: `ir2183pbf-etched.step` / `ir2183pbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ir2183pbf.step` / `ir2183pbf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](docs/ir2183pbf-datasheet.pdf) (22 pp, sha256 `a4ff215a37fe3822`, retrieved 2026-10-30, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ir2183pbf-datasheet.pdf)