component

IR2153SPBF

Public Made by Adom

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Infineon Technologies Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icsir2153spbffactory-2.0.0extractor-text

Verified IR2153SPBF

by Ray · last 5 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

5 Nov 2026RayPublished by the parts factory: tier lcsc, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: IR2153SPBF · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 9-page datasheet
  • ✓distributor: lcsc C537596, digikey IR2153SPBF-ND, mouser 942-IR2153SPBF
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-b2rce5kt/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ir2153spbf.kicad_sym✓ ir2153spbf.kicad_mod✓ ir2153spbf.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 1d ago
viewers ir2153spbf: viewers · Ray 1d ago
ir2153spbf-etched.glb Publish 0.1.0 · Ray 1d ago
ir2153spbf-etched.step ir2153spbf: factory component page (tier=lcsc) · Ray 1d ago
ir2153spbf-hero.glb ir2153spbf: hero GLB from the etched model (keeps the MPN mark) · Ray 1d ago
ir2153spbf-hero.overlay.json Publish 0.1.0 · Ray 1d ago
ir2153spbf.glb Publish 0.1.0 · Ray 1d ago
ir2153spbf.kicad_mod Publish 0.1.0 · Ray 1d ago
ir2153spbf.kicad_sym Publish 0.1.0 · Ray 1d ago
ir2153spbf.lbr Publish 0.1.0 · Ray 1d ago
ir2153spbf.step Publish 0.1.0 · Ray 1d ago
package.json Publish 0.1.0 · Ray 1d ago
page.json Set visibility: public · Ray 1d ago
README.md Publish 0.1.0 · Ray 1d ago
verification.json Verified: Published by the parts factory: tier lcsc, 8 pins · Ray 1d ago

IR2153SPBF

Infineon Technologies · Gate Drive ICs · SOIC-8

IR2153SPBF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Logic and internal gate drive supply, recommended 10V to VCLAMP (15.6V typ. internal zener clamp), with UVLO rising 9.0V and falling 8.0V typ.
2 RT passive Oscillator timing resistor input, with recommended minimum value of 10 kΩ.
3 CT input Oscillator timing capacitor input, minimum 330 pF recommended, with a shutdown threshold of 2.1V typ. that disables both outputs.
4 COM power_in IC power and signal ground.
5 LO output Low side gate driver output, swinging to VCC with 80ns typ. rise and 45ns typ. fall time.
6 VS power_in High voltage floating supply return, steady state offset from -3.0V to 600V.
7 HO output High side gate driver output, referenced to VS and swinging up to VB.
8 VB power_in High side gate driver floating supply, absolute maximum 625V.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Steady state high side floating supply offset voltage VS -3 600 V 2
Supply voltage VCC 10 V 2
Supply current (note 3) ICC 5 mA 2
Junction temperature TJ -40 125 °C 2
Timing resistor value RT 10 kΩ 3
CT pin capacitor value CT 330 pF 3
High side floating supply voltage VB -0.3 625 V 2
High side floating output voltage (VLO-type low side output, min) VLO -0.3 V 2
RT pin voltage VRT -0.3 V 2
CT pin voltage VCT -0.3 V 2
Supply current (note 1) ICC 25 mA 2
RT pin current IRT -5 5 mA 2
Allowable offset voltage slew rate dVs/dt -50 50 V/ns 2
Maximum power dissipation PD 0.625 W TA ≤ +25°C, 8 Lead SOIC 2
Thermal resistance, junction to ambient RthJA 200 °C/W 8 Lead SOIC 2
Junction temperature TJ -55 150 °C 2
Storage temperature TS -55 150 °C 2
Lead temperature (soldering) TL 300 °C soldering, 10 seconds 2
Micropower startup VBS supply current IQBSUV 0 10 μA VCC ≤ VCCUV- 4
Quiescent VBS supply current IQBS 30 50 μA 4
Minimum required VBS voltage for proper functionality from RT to HO VBSMIN 4 5 V VCC=VCCUV+ + 0.1V 4
Offset supply leakage current ILK 50 μA VB = VS = 600V 4
Rising VCC undervoltage lockout threshold VCCUV+ 8.1 9 9.9 V 4
Falling VCC undervoltage lockout threshold VCCUV- 7.2 8 8.8 V 4
VCC undervoltage lockout Hysteresis VCCUVH 0.5 1 1.5 V 4
Micropower startup VCC supply current IQCCUV 75 150 μA VCC ≤ VCCUV- 4
Quiescent VCC supply current IQCC 500 950 μA 4
VCC zener clamp voltage VCLAMP 14.4 15.6 16.8 V ICC = 5mA 4
Oscillator frequency fosc 19.4 20 20.6 kHz RT = 36.9kΩ 4
Oscillator frequency fosc 94 100 106 kHz RT = 7.43kΩ 4
RT pin duty cycle d 48 50 52 % fo < 100kHz 4
CT pin current ICT 0.001 1 uA 4
UV-mode CT pin pulldown current ICTUV 0.3 0.7 1.2 mA VCC = 7V 4
CT voltage shutdown threshold VCTSD 1.8 2.1 2.4 V 4
High-level RT output voltage, VCC - VRT VRT+ 10 50 mV IRT = 100μA 4
High-level RT output voltage, VCC - VRT VRT+ 100 300 mV IRT = 1mA 4
Low-level RT output voltage VRT- 10 50 mV IRT = 100μA 4
Low-level RT output voltage VRT- 100 300 mV IRT = 1mA 4
UV-mode RT output voltage VRTUV 0 100 mV VCC ≤ VCCUV- 4
SD-Mode RT output voltage, VCC - VRT VRTSD 10 50 mV IRT = 100μA, VCT = 0V 4
SD-Mode RT output voltage, VCC - VRT VRTSD 10 300 mV IRT = 1mA, VCT = 0V 4
High level output voltage, VBIAS - VO VOH 0 100 mV IO = 0A 5
Low-level output voltage, VO VOL 0 100 mV IO = 0A 5
UV-mode output voltage, VO VOL_UV 0 100 mV IO = 0A 5
Output rise time tr 80 150 nsec 5
Output fall time tf 45 100 nsec 5
Output deadtime (HO or LO) td 0.75 1.2 1.65 μsec 5

CAD (KiCad official)

  • Symbol: IR2153SPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ir2153spbf-etched.step / ir2153spbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir2153spbf.step / ir2153spbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 668108f6e6f3df78, retrieved 2026-11-05, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF