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IR2153PBF

Public Made by Adom

by adom

Infineon Technologies Gate Drivers, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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Datasheet

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Contents

README

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IR2153PBF

Infineon Technologies · Gate Drivers · PDIP-8

IR2153PBF from Infineon Technologies, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Logic and internal gate drive supply voltage, 10V min to 15.6V zener clamp (VCLAMP) recommended; do not drive from a low-impedance DC source above VCLAMP.
2 RT passive Oscillator timing resistor input; recommended minimum timing resistor 10 kΩ.
3 CT passive Oscillator timing capacitor input (min 330 pF recommended); pulling it below the 2.1V typ shutdown threshold disables both gate driver outputs.
4 COM power_in IC power and signal ground, reference for all voltage ratings.
5 LO output Low side gate driver output, swings -0.3V to VCC + 0.3V.
6 VS power_in High voltage floating supply return, steady-state offset -3.0V to 600V.
7 HO output High side gate driver output, referenced to VS, up to VB + 0.3V.
8 VB power_in High side gate driver floating supply, absolute maximum 625V.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package PDIP-8
Category Motor Driver ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
High side floating supply offset voltage (steady state) VS -3 600 V 2
Supply voltage VCC 10 V 2
Supply current ICC 5 mA 2
Junction temperature TJ -40 125 °C 2
High side floating supply voltage VB -0.3 625 V 2
Low side output voltage VLO -0.3 V 2
RT pin voltage VRT -0.3 V 2
CT pin voltage VCT -0.3 V 2
Supply current ICC 25 mA 2
RT pin current IRT -5 5 mA 2
Allowable offset voltage slew rate dVs/dt -50 50 V/ns 2
Maximum power dissipation (8 Lead DIP) PD 1 W TA ≤ +25°C 2
Thermal resistance, junction to ambient (8 Lead DIP) RthJA 125 °C/W 8 Lead DIP 2
Junction temperature TJ -55 150 °C 2
Storage temperature TS -55 150 °C 2
Lead temperature (soldering) TL 300 °C soldering, 10 seconds 2
Timing resistor value RT 10 kΩ 3
CT pin capacitor value CT 330 pF 3
Micropower startup VBS supply current IQBSUV 0 10 μA VCC ≤ VCCUV- 4
Quiescent VBS supply current IQBS 30 50 μA 4
Minimum required VBS voltage for proper functionality from RT to HO VBSMIN 4 5 V VCC=VCCUV+ + 0.1V 4
Offset supply leakage current ILK 50 μA VB = VS = 600V 4
Rising VCC undervoltage lockout threshold VCCUV+ 8.1 9 9.9 V 4
Falling VCC undervoltage lockout threshold VCCUV- 7.2 8 8.8 V 4
VCC undervoltage lockout Hysteresis VCCUVH 0.5 1 1.5 V 4
Micropower startup VCC supply current IQCCUV 75 150 μA VCC ≤ VCCUV- 4
Quiescent VCC supply current IQCC 500 950 μA 4
VCC zener clamp voltage VCLAMP 14.4 15.6 16.8 V ICC = 5mA 4
Oscillator frequency fosc 19.4 20 20.6 kHz RT = 36.9kΩ 4
Oscillator frequency fosc 94 100 106 kHz RT = 7.43kΩ 4
RT pin duty cycle d 48 50 52 % fo < 100kHz 4
CT pin current ICT 0.001 1 μA 4
UV-mode CT pin pulldown current ICTUV 0.3 0.7 1.2 mA VCC = 7V 4
CT voltage shutdown threshold VCTSD 1.8 2.1 2.4 V 4
High-level RT output voltage, VCC - VRT VRT+ 10 50 mV IRT = 100μA 4
High-level RT output voltage, VCC - VRT VRT+ 100 300 mV IRT = 1mA 4
Low-level RT output voltage VRT- 10 50 mV IRT = 100μA 4
Low-level RT output voltage VRT- 100 300 mV IRT = 1mA 4
UV-mode RT output voltage VRTUV 0 100 mV VCC ≤ VCCUV- 4
SD-Mode RT output voltage, VCC - VRT VRTSD 10 50 mV IRT = 100μA, VCT = 0V 4
SD-Mode RT output voltage, VCC - VRT VRTSD 10 300 mV IRT = 1mA, VCT = 0V 4
High level output voltage, VBIAS - VO VOH 0 100 mV IO = 0A 5
Low-level output voltage, VO VOL 0 100 mV IO = 0A 5
UV-mode output voltage, VO VOL_UV 0 100 mV IO = 0A; VCC ≤ VCCUV- 5
Output rise time tr 80 150 nsec 5
Output fall time tf 45 100 nsec 5
Output deadtime (HO or LO) td 0.75 1.2 1.65 μsec 5

CAD (KiCad official)

  • Symbol: IR2153PBF
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: ir2153pbf-etched.step / ir2153pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir2153pbf.step / ir2153pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 8aaede18b296041c, retrieved 2026-10-19, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF