component

IR2118PBF

Public Made by Adom

by adom

Infineon Technologies Gate Drive ICs, PDIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentpower management icsir2118pbffactory-2.0.0extractor-text

Verified IR2118PBF

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: IR2118PBF · PDIP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 18-page datasheet
  • ✓distributor: lcsc C152176, digikey IR2118PBF-ND, mouser 942-IR2118PBF
  • ✓family: DIP-8_W7.62mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-wtf32lr7/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ir2118pbf.kicad_sym✓ ir2118pbf.kicad_mod✓ ir2118pbf.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 8d ago
viewers ir2118pbf: viewers · Ray 8d ago
ir2118pbf-etched.glb Publish 0.1.0 · Ray 8d ago
ir2118pbf-etched.step ir2118pbf: factory component page (tier=lcsc) · Ray 8d ago
ir2118pbf-hero.glb ir2118pbf: hero GLB from the etched model (keeps the MPN mark) · Ray 8d ago
ir2118pbf-hero.overlay.json Publish 0.1.0 · Ray 8d ago
ir2118pbf.glb Publish 0.1.0 · Ray 8d ago
ir2118pbf.kicad_mod Publish 0.1.0 · Ray 8d ago
ir2118pbf.kicad_sym Publish 0.1.0 · Ray 8d ago
ir2118pbf.lbr Publish 0.1.0 · Ray 8d ago
ir2118pbf.step Publish 0.1.0 · Ray 8d ago
package.json Publish 0.1.0 · Ray 8d ago
page.json Set visibility: public · Ray 8d ago
README.md Publish 0.1.0 · Ray 8d ago
verification.json Verified: Published by the parts factory: tier lcsc, 8 pins · Ray 8d ago

IR2118PBF

Infineon Technologies · Gate Drive ICs · PDIP-8

IR2118PBF from Infineon Technologies, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Logic and gate drive supply, recommended 10 to 20V (absolute max 25V).
2 IN input Inverted logic input (active-low IN bar) for gate driver output HO, out of phase with HO on the IR2118; CMOS Schmitt-triggered with pull-down, 0 to VCC.
3 COM power_in Logic ground, reference for the logic input and output parameters.
4 NC unconnected Lead 4 is drawn on the PDIP lead assignment with no signal name or function in the lead definitions.
5 NC unconnected Lead 5 is drawn on the PDIP lead assignment with no signal name or function in the lead definitions.
6 VS power_in High side floating supply return (offset voltage), operational up to +600V, logic operational for VS of -5 to +600V.
7 HO output High side gate drive output with 200 mA source / 420 mA sink pulsed current capability, swinging between VS and VB.
8 VB power_in High side floating supply, VS + 10V to VS + 20V recommended, absolute max 625V.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package PDIP-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Turn-on propagation delay ton 125 200 ns VS = 0V 3
Turn-off propagation delay toff 105 180 ns VS = 600V 3
Turn-on rise time tr 80 130 ns 3
Turn-off fall time tf 40 65 ns 3
Input voltage logic 0 (IR2118) VIH 9.5 V 3
Input voltage logic 1 (IR2118) VIL 6 V 3
High level output voltage, VBIAS - VO VOH 100 mV IO = 0A 3
Low level output voltage, VO VOL 100 mV IO = 0A 3
Offset supply leakage current ILK 50 µA VB = VS = 600V 3
Quiescent VBS supply current IQBS 50 240 µA VIN = 0V or VCC 3
Quiescent VCC supply current IQCC 70 340 µA VIN = 0V or VCC 3
Logic 1 input bias current (IR2118) IIN+ 20 40 µA IR2118: VIN = 0V 3
Logic 0 input bias current (IR2118) IIN- 1 µA IR2118: VIN = VCC 3
VBS supply undervoltage positive going threshold VBSUV+ 7.6 8.6 9.6 V 3
VBS supply undervoltage negative going threshold VBSUV- 7.2 8.2 9.2 V 3
VCC supply undervoltage positive going threshold VCCUV+ 7.6 8.6 9.6 V 3
VCC supply undervoltage negative going threshold VCCUV- 7.2 8.2 9.2 V 3
Output high short circuit pulsed current IO+ 200 250 mA VO = 0V, VIN = Logic “1”, PW ≤ 10 µs 3
Output low short circuit pulsed current IO- 420 500 mA VO = 15V, VIN = Logic “0”, PW ≤ 10 µs 3
High side floating supply voltage (absolute) VB -0.3 625 V 2
High side floating supply offset voltage (absolute) VS 600 V Note 1 2
Logic supply voltage (absolute) VCC -0.3 25 V 2
Logic input voltage (absolute) VIN -0.3 V Upper limit printed as VCC + 0.3 2
Allowable offset supply voltage transient dVs/dt 50 V/ns Figure 2 2
Package power dissipation @ TA ≤ +25°C (8 lead PDIP) PD 1 W TA ≤ +25°C, 8 lead PDIP 2
Thermal resistance, junction to ambient (8 lead PDIP) RthJA 125 °C/W 8 lead PDIP 2
Junction temperature TJ 150 °C 2
Storage temperature TS -55 150 °C 2
Lead temperature (soldering, 10 seconds) TL 300 °C 10 seconds 2
High side floating supply offset voltage (recommended) VS -5 600 V Note 1: logic operational for VS of -5 to +600V 2
Logic supply voltage (recommended) VCC 10 20 V 2
Logic input voltage (recommended) VIN 0 V Upper limit printed as VCC 2
Ambient temperature TA -40 125 °C 2

CAD (KiCad official)

  • Symbol: IR2118PBF
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: ir2118pbf-etched.step / ir2118pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir2118pbf.step / ir2118pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (18 pp, sha256 5b7fd795fd794426, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF