# IR2117PBF

**Infineon Technologies** · Gate Drivers · PDIP-8

IR2117PBF from Infineon Technologies, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Logic and gate drive supply, recommended 10 to 20V with undervoltage lockout (absolute max 25V). |
| 2 | IN | input | CMOS Schmitt-triggered logic input with pull-down for gate driver output HO, in phase with HO (IR2117); logic 1 threshold min 9.5V, logic 0 max 6.0V. |
| 3 | COM | power_in | Logic ground, reference for the input and output voltages. |
| 4 | NC | unconnected | Pin 4 is shown on the PDIP lead assignment with no signal name or function defined. |
| 5 | NC | unconnected | Pin 5 is shown on the PDIP lead assignment with no signal name or function defined. |
| 6 | VS | power_in | High side floating supply return (offset), operational up to 600V. |
| 7 | HO | output | High side gate drive output for an N-channel power MOSFET or IGBT, with 200 mA source and 420 mA sink pulsed current. |
| 8 | VB | power_in | High side floating supply, VS + 10V to VS + 20V recommended, absolute max 625V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | PDIP-8 |
| Category | Motor Driver ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High side floating supply voltage | VB | -0.3 |  | 625 | V |  | 2 |
| Logic supply voltage | VCC | -0.3 |  | 25 | V |  | 2 |
| Allowable offset supply voltage transient | dVs/dt |  |  | 50 | V/ns | figure 2 | 2 |
| Package power dissipation (8 lead PDIP) | PD |  |  | 1 | W | TA ≤ +25°C | 2 |
| Thermal resistance, junction to ambient (8 lead PDIP) | RthJA |  |  | 125 | °C/W | 8 lead PDIP | 2 |
| Junction temperature | TJ |  |  | 150 | °C |  | 2 |
| Storage temperature | TS | -55 |  | 150 | °C |  | 2 |
| Lead temperature (soldering) | TL |  |  | 300 | °C | soldering, 10 seconds | 2 |
| High side floating supply offset voltage | VS |  |  | 600 | V | Note 1 | 2 |
| Logic supply voltage | VCC | 10 |  | 20 | V |  | 2 |
| Logic input voltage | VIN | 0 |  |  | V |  | 2 |
| Ambient temperature | TA | -40 |  | 125 | °C |  | 2 |
| Turn-on propagation delay | ton |  | 125 | 200 | ns | VS = 0V | 3 |
| Turn-off propagation delay | toff |  | 105 | 180 | ns | VS = 600V | 3 |
| Turn-on rise time | tr |  | 80 | 130 | ns |  | 3 |
| Turn-off fall time | tf |  | 40 | 65 | ns |  | 3 |
| Input voltage - logic 1 (IR2117) | VIH | 9.5 |  |  | V |  | 3 |
| Input voltage - logic 0 (IR2117) | VIL |  |  | 6 | V |  | 3 |
| High level output voltage, VBIAS - VO | VOH |  |  | 100 | mV | IO = 0A | 3 |
| Low level output voltage, VO | VOL |  |  | 100 | mV | IO = 0A | 3 |
| Offset supply leakage current | ILK |  |  | 50 | µA | VB = VS = 600V | 3 |
| Quiescent VBS supply current | IQBS |  | 50 | 240 | µA | VIN = 0V or VCC | 3 |
| Quiescent VCC supply current | IQCC |  | 70 | 340 | µA | VIN = 0V or VCC | 3 |
| Logic 1 input bias current (IR2117) | IIN+ |  | 20 | 40 | µA | VIN = VCC | 3 |
| Logic 0 input bias current (IR2117) | IIN- |  |  | 1 | mA | VIN = 0V | 3 |
| VBS supply undervoltage positive going threshold | VBSUV+ | 7.6 | 8.6 | 9.6 | V |  | 3 |
| VBS supply undervoltage negative going threshold | VBSUV- | 7.2 | 8.2 | 9.2 | V |  | 3 |
| VCC supply undervoltage positive going threshold | VCCUV+ | 7.6 | 8.6 | 9.6 | V |  | 3 |
| VCC supply undervoltage negative going threshold | VCCUV- | 7.2 | 8.2 | 9.2 | V |  | 3 |
| Output high short circuit pulsed current | IO+ | 200 | 250 |  | mA | VO = 0V; VIN = Logic 1; PW ≤ 10 µs | 3 |
| Output low short circuit pulsed current | IO- | 420 | 500 |  | mA | VO = 15V; VIN = Logic 0; PW ≤ 10 µs | 3 |

## CAD (KiCad official)

- Symbol: `IR2117PBF`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files: `ir2117pbf-etched.step` / `ir2117pbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ir2117pbf.step` / `ir2117pbf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588903821389549568) (18 pp, sha256 `5b7fd795fd794426`, retrieved 2026-10-16, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ir2117pbf-datasheet.pdf)