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Contents

README

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IR2110

Infineon · Gate Driver · DIP-14

The IR2110 is a 500 V high- and low-side gate driver for MOSFETs and IGBTs, with independent high-side and low-side input channels and up to 2 A of gate drive. The floating high-side channel uses a bootstrap supply, and the logic inputs are compatible with 3.3 V, 5 V, and 15 V. It is a workhorse for motor inverters, half/full-bridge converters, and induction heating.

Pinout

Pin Name Type Function
1 LO output Low side gate drive output. Push-pull driver referenced to COM; sources/sinks up to 2A to drive a low-side power MOSFET or IGBT gate.
2 COM power_in Low side return. Ground reference for the low-side driver output stage and VCC supply.
3 VCC power_in Low side fixed supply voltage referenced to COM. Recommended operating range 10-20V; absolute max 25V. Powers the low-side output driver and, via the bootstrap diode, charges the high-side supply.
4 NC unconnected No connection on the 14-lead PDIP package (pin position between VCC and VS).
5 VS power_in High side floating supply return. Connects to the source of the high-side MOSFET / emitter of the high-side IGBT and forms the negative rail of the bootstrap capacitor. Operational to +500V above COM (IR2110).
6 VB power_in High side floating supply. Positive rail of the bootstrap capacitor between VB and VS; typically VS+10V to VS+20V. Powers the high-side output driver.
7 HO output High side gate drive output. Floating push-pull driver referenced to VS; drives the gate of the high-side MOSFET/IGBT with up to 2A source/sink.
8 NC unconnected No connection on the 14-lead PDIP package (pin position between HO and VDD).
9 VDD power_in Logic supply, referenced to VSS. Recommended VSS+3V to VSS+20V; 3.3V/CMOS/LSTTL compatible input thresholds.
10 HIN input Logic input for high side gate driver output (HO), in phase. Schmitt-triggered CMOS input with internal pull-down; VIH ≥ 9.5V is not required - thresholds referenced to VSS/VDD.
11 SD input Shutdown logic input. When asserted high, forces both HO and LO outputs low regardless of HIN/LIN. Schmitt-triggered CMOS input with internal pull-down.
12 LIN input Logic input for low side gate driver output (LO), in phase. Schmitt-triggered CMOS input with internal pull-down.
13 VSS power_in Logic ground / logic supply offset reference. May be offset from COM by ±5V (see recommended operating conditions).
14 NC unconnected No connection on the 14-lead PDIP package (pin position between VSS and LO).

Key specifications

Parameter Value
Type 500 V high/low-side gate driver
Output current 2 A source / 2 A sink
Offset voltage Up to 500 V (high side)
Inputs Independent HIN, LIN + shutdown
Supply voltage 10 V to 20 V
Logic supply 3.3 V to 20 V
Operating temperature -40 C to 125 C

Ordering variants

Same part, different packaging or reel option.

  • IR2110PBF
  • IR2110IR2113PBF
  • IR2110SPBF
  • IR2110IR2113SPBF

CAD (KiCad official)

  • Symbol: ir2110.kicad_sym
  • Footprint: ir2110.kicad_mod
  • 3D model: DIP-14 body from KiCad Package_DIP/DIP-14_W7.62mm.
  • 3D model files: ir2110-etched.step / ir2110-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir2110.step / ir2110.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon datasheet (17 pp, sha256 e8ed2058e4b5c6f1, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF