# IR2108STRPBF

**Infineon Technologies** · Gate Drivers · SOIC-8

IR2108STRPBF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low side and logic fixed supply, recommended 10 V to 20 V and absolute maximum -0.3 V to 25 V, referenced to COM. |
| 2 | HIN | input | Logic input for the high side gate driver output (HO), in phase, referenced to COM; logic 1 requires at least 2.9 V and logic 0 at most 0.8 V with VCC = 10 V to 20 V. |
| 3 | LIN | input | Logic input for the low side gate driver output (LO), out of phase, referenced to COM; logic 1 requires at least 2.9 V and logic 0 at most 0.8 V with VCC = 10 V to 20 V. |
| 4 | COM | power_in | Low side return and reference for all voltage ratings, logic inputs and outputs HO and LO. |
| 5 | LO | output | Low side gate driver output, swinging between COM and VCC (recommended VLO 0 V to VCC). |
| 6 | VS | power_in | High side floating supply return; offset must stay between VB - 25 V and VB + 0.3 V, recommended up to 600 V, with dVS/dt limited to 50 V/ns. |
| 7 | HO | output | High side gate driver output, swinging between VS and VB (VHO limited to VS - 0.3 V to VB + 0.3 V). |
| 8 | VB | power_in | High side floating supply, recommended VS + 10 V to VS + 20 V and absolute maximum -0.3 V to 625 V referenced to COM. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | SOIC-8 |
| Category | Motor Driver ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| High side floating absolute voltage | VB | -0.3 |  | 625 | V |  | 2 |
| Low side and logic fixed supply voltage | VCC | -0.3 |  | 25 | V |  | 2 |
| Low side output voltage | VLO | -0.3 |  |  | V |  | 2 |
| Allowable offset supply voltage transient | dVS/dt |  |  | 50 | V/ns |  | 2 |
| Package power dissipation (8 lead SOIC) | PD |  |  | 0.625 | W | TA ≤ +25C | 2 |
| Thermal resistance, junction to ambient (8 lead SOIC) | RthJA |  |  | 200 | C/W | 8 lead SOIC | 2 |
| Junction temperature | TJ |  |  | 150 | C |  | 2 |
| Storage temperature | TS | -50 |  | 150 | C |  | 2 |
| Lead temperature (soldering) | TL |  |  | 300 | C | 10 seconds | 2 |
| High side floating supply offset voltage | VS |  |  | 600 | V | Note 1 | 2 |
| Low side and logic fixed supply voltage | VCC | 10 |  | 20 | V |  | 2 |
| Low side output voltage | VLO | 0 |  |  | V |  | 2 |
| Ambient temperature | TA | -40 |  | 125 | C |  | 2 |
| Logic "1" input voltage for HIN & logic "0" for LIN | VIH | 2.9 |  |  | V | VCC = 10V to 20V | 3 |
| Logic "0" input voltage for HIN & logic "1" for LIN | VIL |  |  | 0.8 | V | VCC = 10V to 20V | 3 |
| High level output voltage, VBIAS - VO | VOH |  | 0.8 | 1.4 | V | IO = 20 mA | 3 |
| Low level output voltage, VO | VOL |  | 0.3 | 0.6 | V | IO = 20 mA | 3 |
| Offset supply leakage current | ILK |  |  | 50 | µA | VB = VS = 600V | 3 |
| Quiescent VBS supply current | IQBS | 20 | 75 | 130 | µA | VIN = 0V or 5V | 3 |
| Quiescent VCC supply current | IQCC | 0.4 | 1 | 1.6 | mA | VIN = 0V or 5V; RDT=0 | 3 |
| Logic "1" input bias current | IIN+ |  | 5 | 20 | µA | HIN = 5V, LIN = 0V | 3 |
| Logic "0" input bias current | IIN- |  |  | 2 | µA | HIN = 0V, LIN = 5V | 3 |
| VCC and VBS supply undervoltage positive going threshold | VCCUV+, VBSUV+ | 8 | 8.9 | 9.8 | V |  | 3 |
| VCC and VBS supply undervoltage negative going threshold | VCCUV-, VBSUV- | 7.4 | 8.2 | 9 | V |  | 3 |
| Undervoltage hysteresis | VCCUVH, VBSUVH | 0.3 | 0.7 |  | V |  | 3 |
| Output high short circuit pulsed current | IO+ | 120 | 200 |  | mA | VO = 0V, PW ≤ 10 s | 3 |
| Output low short circuit pulsed current | IO- | 250 | 350 |  | mA | VO = 15V, PW ≤ 10 s | 3 |
| Turn-on propagation delay | ton |  | 220 | 300 | nsec | VS = 0V | 3 |
| Turn-off propagation delay | toff |  | 200 | 280 | nsec | VS = 0V or 600V | 3 |
| Delay matching /ton - toff/ | MT |  | 0 | 30 | nsec |  | 3 |
| Turn-on rise time | tr |  | 150 | 220 | nsec | VS = 0V | 3 |
| Turn-off fall time | tf |  | 50 | 80 | nsec | VS = 0V | 3 |
| Deadtime: LO turn-off to HO turn-on (DTLO-HO) and HO turn-off to LO turn-on (DTHO-LO) | DT | 400 | 540 | 680 | nsec | RDT= 0 | 3 |
| Deadtime matching = /DTLO-HO - DTHO-LO/ | MDT |  | 0 | 60 | nsec | RDT=0 | 3 |

## CAD (KiCad official)

- Symbol: `IR2108STRPBF`
- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`
- 3D model: SOIC-8 (KiCad packages3D, STEP)
- 3D model files: `ir2108strpbf-etched.step` / `ir2108strpbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ir2108strpbf.step` / `ir2108strpbf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8586195719321759744) (23 pp, sha256 `a8c23cdba6c57983`, retrieved 2026-10-19, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ir2108strpbf-datasheet.pdf)