# IR2106PBF

**Infineon Technologies** · Gate Drive ICs · PDIP-8

IR2106PBF from Infineon Technologies, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCC | power_in | Low side and logic fixed supply, recommended 10 to 20 V, with absolute maximum -0.3 to 25 V referenced to COM. |
| 2 | HIN | input | Logic input for the high side gate driver output (HO), in phase, with VIH minimum 2.9 V and VIL maximum 0.8 V for VCC = 10 to 20 V, and logic input voltage limited to VSS-0.3 V to VCC+0.3 V. |
| 3 | LIN | input | Logic input for the low side gate driver output (LO), in phase, with VIH minimum 2.9 V and VIL maximum 0.8 V for VCC = 10 to 20 V, and logic input voltage limited to VSS-0.3 V to VCC+0.3 V. |
| 4 | COM | power_in | Low side return and reference for all voltage parameters, with the logic and low side outputs referenced to this pin. |
| 5 | LO | output | Low side gate drive output, operating between VLO = 0 V and VCC, with absolute limits of -0.3 V to VCC+0.3 V. |
| 6 | VS | power_in | High side floating supply return, with offset voltage between VB-25 V and VB+0.3 V, rated up to 600 V, and dVS/dt limited to 50 V/ns. |
| 7 | HO | output | High side gate drive output, referenced to VS, with output voltage between VS-0.3 V and VB+0.3 V. |
| 8 | VB | power_in | High side floating supply, with VB-to-VS recommended 10 to 20 V and absolute VB limit of -0.3 V to 625 V referenced to COM. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | PDIP-8 |
| Category | Power Management ICs |
| Pins | 8 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Absolute maximum: High side floating absolute voltage | VB | -0.3 |  | 625 | V |  | 2 |
| Absolute maximum: Low side and logic fixed supply voltage | VCC | -0.3 |  | 25 | V |  | 2 |
| Absolute maximum: Low side output voltage | VLO | -0.3 |  |  | V |  | 2 |
| Absolute maximum: Allowable offset supply voltage transient | dVS/dt |  |  | 50 | V/ns |  | 2 |
| Absolute maximum: Package power dissipation | PD |  |  | 1 | W | TA ≤ +25°C, 8 lead PDIP | 2 |
| Absolute maximum: Thermal resistance, junction to ambient | RthJA |  |  | 125 | °C/W | 8 lead PDIP | 2 |
| Absolute maximum: Junction temperature | TJ |  |  | 150 | °C |  | 2 |
| Absolute maximum: Storage temperature | TS | -50 |  | 150 | °C |  | 2 |
| Absolute maximum: Lead temperature | TL |  |  | 300 | °C | soldering, 10 seconds | 2 |
| Recommended: High side floating supply offset voltage | VS |  |  | 600 | V | Note 1 | 3 |
| Recommended: Low side and logic fixed supply voltage | VCC | 10 |  | 20 | V | IR2106(4) | 3 |
| Recommended: Low side output voltage | VLO | 0 |  |  | V |  | 3 |
| Recommended: Ambient temperature | TA | -40 |  | 125 | °C |  | 3 |
| Turn-on propagation delay | ton |  | 220 | 300 | nsec | VS = 0V | 3 |
| Turn-off propagation delay | toff |  | 200 | 280 | nsec | VS = 0V or 600V | 3 |
| Delay matching, HS & LS turn-on/off | MT |  | 0 | 30 | nsec |  | 3 |
| Turn-on rise time | tr |  | 150 | 220 | nsec | VS = 0V | 3 |
| Turn-off fall time | tf |  | 50 | 80 | nsec | VS = 0V | 3 |
| Logic '1' input voltage | VIH | 2.9 |  |  | V | VCC = 10V to 20V | 4 |
| Logic '0' input voltage | VIL |  |  | 0.8 | V | VCC = 10V to 20V | 4 |
| High level output voltage, VBIAS - VO | VOH |  | 0.8 | 1.4 | V | IO = 20 mA | 4 |
| Low level output voltage, VO | VOL |  | 0.3 | 0.6 | V | IO = 20 mA | 4 |
| Offset supply leakage current | ILK |  |  | 50 | µA | VB = VS = 600V | 4 |
| Quiescent VBS supply current | IQBS | 20 | 75 | 130 | µA | VIN = 0V or 5V | 4 |
| Quiescent VCC supply current | IQCC | 60 | 120 | 180 | µA | VIN = 0V or 5V | 4 |
| Logic '1' input bias current | IIN+ |  | 5 | 20 | µA | VIN = 5V (IR2106(4)) | 4 |
| Logic '0' input bias current | IIN- |  |  | 2 | µA | VIN = 0V (IR2106(4)) | 4 |
| VCC and VBS supply undervoltage positive going threshold | VCCUV+, VBSUV+ | 8 | 8.9 | 9.8 | V |  | 4 |
| VCC and VBS supply undervoltage negative going threshold | VCCUV-, VBSUV- | 7.4 | 8.2 | 9 | V |  | 4 |
| VCC and VBS supply undervoltage hysteresis | VCCUVH, VBSUVH | 0.3 | 0.7 |  | V |  | 4 |
| Output high short circuit pulsed current | IO+ | 120 | 200 |  | mA | VO = 0V, PW ≤ 10 µs | 4 |
| Output low short circuit pulsed current | IO- | 250 | 350 |  | mA | VO = 15V, PW ≤ 10 µs | 4 |

## CAD (KiCad official)

- Symbol: `IR2106PBF`
- Footprint: `Package_DIP:DIP-8_W7.62mm`
- 3D model: PDIP-8 (KiCad packages3D, STEP)
- 3D model files: `ir2106pbf-etched.step` / `ir2106pbf-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ir2106pbf.step` / `ir2106pbf.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](docs/ir2106pbf-datasheet.pdf) (23 pp, sha256 `8903423c1713163e`, retrieved 2026-10-30, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ir2106pbf-datasheet.pdf)