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IR2101PBF

Infineon Technologies · Gate Drive ICs · PDIP-8

IR2101PBF from Infineon Technologies, in a PDIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Low side and logic fixed supply, recommended 10 to 20V (absolute max 25V) with undervoltage lockout.
2 HIN input Logic input for high side gate driver output (HO), in phase for IR2101; 3.3V, 5V and 15V logic compatible.
3 LIN input Logic input for low side gate driver output (LO), in phase for IR2101; 3.3V, 5V and 15V logic compatible.
4 COM power_in Low side return, the ground reference for logic inputs and the LO output.
5 LO output Low side gate drive output, swings from 0 to VCC.
6 VS power_in High side floating supply return (offset), operational up to 600V.
7 HO output High side gate drive output, swings from VS to VB.
8 VB power_in High side floating supply, VS+10V to VS+20V (absolute max 625V).

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package PDIP-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Low side and logic fixed supply voltage (VCC) absolute maximum VCC -0.3 25 V 2
High side floating supply voltage (VB) absolute maximum VB -0.3 625 V 2
Allowable offset supply voltage transient dVS/dt 50 V/ns 2
Package power dissipation (8 lead PDIP) PD 1 W TA ≤ +25°C 2
Thermal resistance, junction to ambient (8 lead PDIP) RthJA 125 °C/W 8 lead PDIP 2
Junction temperature TJ 150 °C 2
Storage temperature TS -55 150 °C 2
Lead temperature (soldering) TL 300 °C soldering, 10 seconds 2
High side floating supply offset voltage (VS) recommended VS 600 V Note 1: logic operational for VS of -5 to +600V 2
Low side and logic fixed supply voltage (VCC) recommended VCC 10 20 V 2
Ambient temperature (TA) TA -40 125 °C 2
Logic "1" input voltage (IR2101) VIH 3 V VCC = 10V to 20V 3
Logic "0" input voltage (IR2101) VIL 0.8 V VCC = 10V to 20V 3
High level output voltage, VBIAS - VO VOH 100 mV IO = 0A 3
Low level output voltage, VO VOL 100 mV IO = 0A 3
Offset supply leakage current ILK 50 µA VB = VS = 600V 3
Quiescent VBS supply current IQBS 30 55 µA VIN = 0V or 5V 3
Quiescent VCC supply current IQCC 150 270 µA VIN = 0V or 5V 3
Logic "1" input bias current IIN+ 3 10 µA VIN = 5V (IR2101) 3
Logic "0" input bias current IIN- 1 µA VIN = 0V (IR2101) 3
VCC supply undervoltage positive going threshold VCCUV+ 8 8.9 9.8 V 3
VCC supply undervoltage negative going threshold VCCUV- 7.4 8.2 9 V 3
Output high short circuit pulsed current IO+ 130 210 mA VO = 0V, VIN = Logic “1”, PW ≤ 10 µs 3
Output low short circuit pulsed current IO- 270 360 mA VO = 15V, VIN = Logic “0”, PW ≤ 10 µs 3
Turn-on propagation delay ton 160 220 ns VS = 0V 3
Turn-off propagation delay toff 150 220 ns VS = 600V 3
Turn-on rise time tr 100 170 ns 3
Turn-off fall time tf 50 90 ns 3
Delay matching, HS & LS turn-on/off MT 50 ns 3

CAD (KiCad official)

  • Symbol: IR2101PBF
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: PDIP-8 (KiCad packages3D, STEP)
  • 3D model files: ir2101pbf-etched.step / ir2101pbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir2101pbf.step / ir2101pbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (14 pp, sha256 5f7571f792963891, retrieved 2026-10-29, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF