main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 17d ago
viewers ir2085strpbf: viewers · Ray 17d ago
ir2085strpbf-etched.glb ir2085strpbf: factory component page (tier=lcsc) · Ray 17d ago
ir2085strpbf-etched.step ir2085strpbf: factory component page (tier=lcsc) · Ray 17d ago
ir2085strpbf-hero.glb ir2085strpbf: hero GLB from the etched model (keeps the MPN mark) · Ray 17d ago
ir2085strpbf-hero.overlay.json Publish 0.1.0 · Ray 17d ago
ir2085strpbf.glb Publish 0.1.0 · Ray 17d ago
ir2085strpbf.kicad_mod Publish 0.1.0 · Ray 17d ago
ir2085strpbf.kicad_sym Publish 0.1.0 · Ray 17d ago
ir2085strpbf.lbr Publish 0.1.0 · Ray 17d ago
ir2085strpbf.step Publish 0.1.0 · Ray 17d ago
package.json Publish 0.1.0 · Ray 17d ago
page.json Set visibility: public · Ray 17d ago
README.md Publish 0.1.0 · Ray 17d ago

IR2085STRPbF

Infineon Technologies · Gate Drivers · SOIC-8

IR2085STRPbF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Low-side logic supply input, recommended 10 V to 15 V, with undervoltage lockout (UVCC+ 6.8-7.8 V, UVCC- 6.3-7.3 V) and a bypass ceramic capacitor to COM placed close to the device.
2 OSC passive Oscillator programming pin: RT connects from VCC to OSC and CT from OSC to COM, with fOSC = 1/(2·RT·CT), RT recommended 10 kΩ to 100 kΩ and CT recommended 47 pF to 470 pF, and RT below 10 kΩ should be avoided.
3 CS input Current sense input to the overcurrent comparator; exceeding the overcurrent threshold (VCS+ 250-350 mV) terminates the output pulses and starts a new soft-start cycle once the voltage falls back below the threshold.
4 GND power_in Logic supply return and signal/power ground for all functions (called COM in the pin descriptions), where a low-impedance ground plane is highly recommended due to high current and high frequency operation.
5 LO output Low-side gate drive output that can directly drive a power MOSFET gate with 1 A peak source and sink current, and should be placed very close to the low-side MOSFET gate.
6 VS power_in High-side floating supply return, to be connected directly to the high-side MOSFET source with the shortest possible trace; steady-state offset range is -5 V to 100 V, and the Vs node should not fly inductively below ground by more than 5 V.
7 HO output High-side gate drive output that can directly drive a power MOSFET gate with 1 A peak source and sink current, and should be placed very close to the high-side MOSFET gate.
8 Vb power_in High-side floating supply input, derived from a bootstrap circuit using a low-leakage Schottky diode and ceramic capacitor, with recommended Vb of up to 15 V and an absolute maximum of 150 V.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOIC-8
Category Motor Driver ICs
Pins 8

CAD (KiCad official)

  • Symbol: IR2085STRPbF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ir2085strpbf-etched.step / ir2085strpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir2085strpbf.step / ir2085strpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (8 pp, sha256 5c9e26e854a1cb2b, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF