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IR1167ASTRPBF

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Infineon Technologies Gate Drive ICs, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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IR1167ASTRPBF

Infineon Technologies · Gate Drive ICs · SOIC-8

IR1167ASTRPBF from Infineon Technologies, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 VCC power_in Supply voltage pin monitored by the undervoltage lockout, with the IC turned off by pulling it below the minimum turn-off threshold without damage, and supply range 11.3 V to 20 V per the features list.
2 OVT input Offset voltage trimming pin that sets the input offset of the turn-off threshold VTH1 and may be tied to GND, to VCC or left floating to select one of three ranges.
3 MOT input Minimum on time programming pin, set by a resistor referenced to GND, giving a minimum on time between 200 ns and 3 µs (typ.).
4 EN input Enable pin that puts the IC into sleep mode when pulled below 2.5 V (typ.), requires EN positive pulse width longer than 20 µs and negative pulse width longer than 10 µs, and is not intended for high-frequency operation.
5 VD input High-voltage FET drain sense pin rated for 200 V, where additional filtering or current limiting is not recommended as it would degrade switching performance.
6 VS power_in Differential source sense pin that must not be connected directly to the power ground pin 7 and must be used as a Kelvin contact as close as possible to the MOSFET source.
7 GND power_in Ground potential pin to which the internal control circuit and gate driver are referenced, and to which all voltages are referenced in the absolute maximum ratings.
8 GATE output Gate drive output providing 2 A peak source and 7 A peak sink capability, with drive voltage internally limited to 10.7 V (IR1167A) or 14.5 V (IR1167B) typical clamp.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package SOIC-8
Category Power Management ICs
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC -0.3 20 V 5
Enable Voltage VEN -0.3 20 V 5
Cont. Drain Sense Voltage VD -3 200 V 5
Pulse Drain Sense Voltage VD -5 200 V 5
Source Sense Voltage VS -3 20 V 5
Gate Voltage VGATE -0.3 20 V VCC=20V, Gate off 5
Operating Junction Temperature TJ -40 150 °C 5
Storage Temperature TS -55 150 °C 5
Thermal Resistance RθJA 128 °C/W SOIC-8 5
Package Power Dissipation PD 970 mW SOIC-8, TAMB=25°C 5
ESD Protection VESD 2 kV Human Body Model 5
Switching Frequency fsw 500 kHz 5
Supply Voltage Operating Range VCC 12 18 V 6
VCC Turn On Threshold VCC ON 9.8 10.5 11.3 V 6
VCC Turn Off Threshold (Under Voltage Lock Out) VCC UVLO 8.4 9 9.7 V 6
VCC Turn On/Off Hysteresis VCC HYST 1.4 1.55 1.7 V 6
Operating Current IR1167A ICC 8.5 10 mA CLOAD=1nF, fsw=400kHz 6
Operating Current IR1167A ICC 50 65 mA CLOAD=10nF, fsw=400kHz 6
Quiescent Current IQCC 1.8 2.2 mA 6
Start-up Current ICC START 100 200 µA VCC=VCC ON - 0.1V 6
Sleep Current ISLEEP 150 200 µA VEN=0V, VCC =15V 6
Enable Voltage High VENHI 2.15 2.75 3.2 V 6
Enable Voltage Low VENLO 1.2 1.6 2 V 6
Enable Pull-up Resistance REN 1.5 MΩ GBD 6
Turn-off Threshold VTH1 -7 -3.5 0 mV OVT = 0V, VS=0V 6
Turn-off Threshold VTH1 -15 -10.5 -7 mV OVT floating, VS=0V 6
Turn-off Threshold VTH1 -23 -19 -15 mV OVT = VCC, VS=0V 6
Turn-on Threshold VTH2 -150 -50 mV 6
Hysteresis VHYST 55 mV 6
Input Bias Current IIBIAS1 1 7.5 µA VD = -50mV 6
Input Bias Current IIBIAS2 30 100 µA VD = 200V 6
Comparator Input Offset VOFFSET 2 mV GBD 6
Input CM Voltage Range VCM -0.15 2 V 6
Blanking pulse duration tBLANK 9 15 25 µs 6
Reset Threshold VTH3 2.5 V VCC=10V - GBD 6
Reset Threshold VTH3 5.4 V VCC=20V - GBD 6
Hysteresis VHYST3 40 mV VCC=10V - GBD 6
Minimum on time TONmin 190 240 290 ns RMOT =5k VCC=12V 7
Minimum on time TONmin 2.4 3 3.6 µs RMOT =75k VCC=12V 7
Gate Low Voltage VGLO 0.3 0.5 V IGATE = 200mA 7
Gate High Voltage IR1167A VGTH 9 10.7 12.5 V VCC=12V-18V (internally clamped) 7
Rise Time tr1 18 ns CLOAD = 1nF, VCC=12V 7
Rise Time tr2 125 ns CLOAD = 10nF, VCC=12V 7
Fall Time tf1 10 ns CLOAD = 1nF, VCC=12V 7
Fall Time tf2 30 ns CLOAD = 10nF, VCC=12V 7
Turn on Propagation Delay tDon 60 80 ns VDS to VGATE -100mV overdrive 7
Turn off Propagation Delay tDoff 40 65 ns VDS to VGATE -100mV overdrive 7
Pull up Resistance rup 4 Ω IGATE = 1A - GBD 7
Pull down Resistance rdown 0.7 Ω IGATE = -200mA 7
Output Peak Current (source) IO source 2 A CLOAD = 10nF - GBD 7
Output Peak Current (sink) IO sink 7 A 7

CAD (KiCad official)

  • Symbol: IR1167ASTRPBF
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: ir1167astrpbf-etched.step / ir1167astrpbf-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ir1167astrpbf.step / ir1167astrpbf.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (25 pp, sha256 0570080b54f17503, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF