Loads on click. Unloads only if this page sits in the background.

Symbol & Footprint

Schematic Symbol

Open full view ↗
Loads on click. Unloads only if this page sits in the background.

PCB Footprint

Open full view ↗
Loads on click. Unloads only if this page sits in the background.
Loads on click. Unloads only if this page sits in the background.
Download PDF
Contents

README

markdown

IPS2550DE1R

RENESAS · Position Sensors · TSSOP-16-EP

IPS2550DE1R from RENESAS, in a TSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ADR_IRQN bidirectional Address-select digital input for I2C slave address selection via pull-up or pull-down resistor RADR, or programmable push/pull interrupt output for diagnostic signals.
2 RX1 input Analog input for receiver coil 1; sine signal in ASIL-C mode (default) or sine signal in compatibility mode.
3 RX2 input Analog input for receiver coil 2; cosine signal in ASIL-C mode (default) or inverted sine signal in compatibility mode.
4 RX3 input Analog input for receiver coil 3; inverted sine signal in ASIL-C mode (default) or cosine signal in compatibility mode.
5 RX4 input Analog input for receiver coil 4; inverted cosine signal in both ASIL-C configuration mode and compatibility mode.
6 TX1 bidirectional Transmitter coil connection point 1; connects to resonant LC oscillator circuit with external capacitor CTx1 to GND and coil inductance L.
7 TX2 bidirectional Transmitter coil connection point 2; connects to resonant LC oscillator circuit with external capacitor CTx2 to GND and coil inductance L.
8 VDDA power_in Internally regulated analog supply voltage (2.85-3.1V in 3.3V mode, 3.9-4.1V in 5V mode); requires external 100nF capacitor CVA to GND.
9 GND power_in Common ground connection for all supply and signal returns.
10 VDD power_in External power supply voltage (3.3V±0.3V or 5.0V±0.5V); requires external 70nF capacitor CVDD to GND.
11 COSN output Buffered inverted cosine analog output with VDD/2 DC bias; output range 0.4V to (VDD-0.4V) for ±2.5mA load.
12 COS_SDA bidirectional Buffered cosine analog output (VDD/2 bias, output range 0.4V to VDD-0.4V) or open-drain I2C serial data line (3mA sink current) during programming mode.
13 SINN output Buffered inverted sine analog output with VDD/2 DC bias; output range 0.4V to (VDD-0.4V) for ±2.5mA load.
14 SIN_SCL bidirectional Buffered sine analog output (VDD/2 bias, output range 0.4V to VDD-0.4V) or I2C serial clock line during programming mode.
15 SCL input Digital I2C clock input for programming and diagnostic interface (0-100 kHz max frequency); requires external pull-up resistor RSCL (1.8-4.7kΩ) to VDD.
16 SDA bidirectional Open-drain bidirectional I2C serial data line for programming and diagnostics (3mA sink current capability); requires external pull-up resistor RSDA (1.8-4.7kΩ) to VDD.
17 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer RENESAS
Package TSSOP-16-EP
Category Sensors
Pins 17

CAD (KiCad official)

  • Symbol: IPS2550DE1R
  • Footprint: Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm
  • 3D model: TSSOP-16-EP (KiCad packages3D, STEP)
  • 3D model files: ips2550de1r-etched.step / ips2550de1r-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ips2550de1r.step / ips2550de1r.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (52 pp, sha256 04bb0038dd02e7fb, retrieved 2026-09-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF