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IPP600N25N3GXKSA1

Infineon Technologies · MOSFETs · TO-220-3

IPP600N25N3GXKSA1 from Infineon Technologies, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate. Isolated MOS gate controlling the channel; VGS threshold typ. 3 V (2-4 V). Absolute max VGS ±20 V, gate charge Qg typ. 22 nC, gate resistance RG typ. 2.5 Ω. Drive to ~10 V for full enhancement (RDS(on) ≤ 60 mΩ).
2 D passive Drain. Positive terminal of the N-channel switch and cathode of the intrinsic body diode. Rated VDS(BR) 250 V, ID 25 A @ TC=25 °C (18 A @ TC=100 °C), pulsed 100 A. Electrically common with the metal mounting tab.
3 S passive Source. Negative terminal of the N-channel switch and anode of the intrinsic body diode (VSD typ. 1 V @ IF=25 A). Reference for VGS and VDS; carries the full drain current in the on-state.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-220-3
Category Transistors/Thyristors
Pins 3

Ordering variants

Same part, different packaging or reel option.

  • IPP600N25N3GXKSA1
  • IPP600N25N3GXKSA1IPB600N25N3G
  • IPP600N25N3GXKSA1IPI600N25N3G

CAD (KiCad official)

  • Symbol: IPP600N25N3GXKSA1
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220-3 (KiCad packages3D, STEP)
  • 3D model files: ipp600n25n3gxksa1-etched.step / ipp600n25n3gxksa1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipp600n25n3gxksa1.step / ipp600n25n3gxksa1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (None pp, sha256 8b64c8ffb981dd78, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF