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IPP120N08S403AKSA1

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Infineon Technologies MOSFETs, TO-220-3. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componenttransistors-thyristorsipp120n08s403aksa1factory-2.0.0extractor-text

Verified IPP120N08S403AKSA1

by Ray · last 2 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

2 Nov 2026RayPublished by the parts factory: tier lcsc, 3 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: IPP120N08S403AKSA1 · TO-220-3 · 3 pins
  • ✓copper: 3 copper pads, none touching another net
  • ✓datasheet: all 3 pin names found in the 9-page datasheet
  • ✓distributor: lcsc C7210882, digikey 448-IPP120N08S403AKSA1-ND, mouser 726-IPP120N08S403AKS
  • ✓family: TO-220-3_Vertical
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-4h42_a76/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): no component.package_dims on the page: the model is unchecked against the datasheet drawing
  • ✓pads: 3 pins = 3 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 3 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ ipp120n08s403aksa1.kicad_sym✓ ipp120n08s403aksa1.kicad_mod✓ ipp120n08s403aksa1.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 4d ago
viewers ipp120n08s403aksa1: viewers · Ray 4d ago
ipp120n08s403aksa1-etched.glb Publish 0.1.0 · Ray 4d ago
ipp120n08s403aksa1-etched.step ipp120n08s403aksa1: factory component page (tier=lcsc) · Ray 4d ago
ipp120n08s403aksa1-hero.glb ipp120n08s403aksa1: hero GLB from the etched model (keeps the MPN mark) · Ray 4d ago
ipp120n08s403aksa1-hero.overlay.json Publish 0.1.0 · Ray 4d ago
ipp120n08s403aksa1.glb Publish 0.1.0 · Ray 4d ago
ipp120n08s403aksa1.kicad_mod Publish 0.1.0 · Ray 4d ago
ipp120n08s403aksa1.kicad_sym Publish 0.1.0 · Ray 4d ago
ipp120n08s403aksa1.lbr Publish 0.1.0 · Ray 4d ago
ipp120n08s403aksa1.step Publish 0.1.0 · Ray 4d ago
package.json Publish 0.1.0 · Ray 4d ago
page.json Set visibility: public · Ray 4d ago
README.md Publish 0.1.0 · Ray 4d ago
verification.json Verified: Published by the parts factory: tier lcsc, 3 pins · Ray 4d ago

IPP120N08S403AKSA1

Infineon Technologies · MOSFETs · TO-220-3

IPP120N08S403AKSA1 from Infineon Technologies, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate pin of the N-channel enhancement-mode MOSFET, with a gate-source voltage limit of ±20 V.
2 Drain passive Drain pin, also connected to the Tab, rated for VDS of 80 V and 120 A continuous drain current at TC=25°C.
3 Source passive Source pin of the MOSFET, carrying up to 120 A continuous drain current at TC=25°C.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-220-3
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Continuous drain current ID 120 A TC=25°C, VGS=10V 1
Pulsed drain current ID,pulse 480 A TC=25°C 1
Avalanche energy, single pulse EAS 920 mJ ID=60A 1
Avalanche current, single pulse IAS 120 A 1
Gate source voltage VGS -20 20 V 1
Power dissipation Ptot 278 W TC=25°C 1
Operating and storage temperature Tj, Tstg -55 175 °C 1
Thermal resistance, junction-case RthJC 0.54 K/W 2
Thermal resistance, junction-ambient, leaded RthJA 62 K/W 2
Drain-source breakdown voltage V(BR)DSS 80 V VGS=0V, ID=1mA 2
Gate threshold voltage VGS(th) 2 3 4 V VDS=VGS, ID=223µA 2
Zero gate voltage drain current IDSS 0.01 1 µA VDS=80V, VGS=0V 2
Zero gate voltage drain current IDSS 10 200 µA VDS=80V, VGS=0V, Tj=125°C 2
Gate-source leakage current IGSS 100 nA VGS=20V, VDS=0V 2
Drain-source on-state resistance RDS(on) 2.4 2.8 mW VGS=10V, ID=100A 2
Input capacitance Ciss 8884 11550 pF VGS=0V, VDS=25V, f=1MHz 3
Output capacitance Coss 3435 4465 pF VGS=0V, VDS=25V, f=1MHz 3
Reverse transfer capacitance Crss 177 354 pF VGS=0V, VDS=25V, f=1MHz 3
Gate to source charge Qgs 43 57 nC VDD=64V, ID=120A, VGS=0 to 10V 3
Gate to drain charge Qgd 27 55 nC VDD=64V, ID=120A, VGS=0 to 10V 3
Gate charge total Qg 128 167 nC VDD=64V, ID=120A, VGS=0 to 10V 3
Diode continuous forward current IS 120 A TC=25°C 3
Diode pulse current IS,pulse 480 A TC=25°C 3
Diode forward voltage VSD 0.9 1.3 V VGS=0V, IF=100A, Tj=25°C 3
Turn-on delay time td(on) 30 ns VDD=40V, VGS=10V, ID=120A, RG=3.5W 3
Rise time tr 15 ns VDD=40V, VGS=10V, ID=120A, RG=3.5W 3
Turn-off delay time td(off) 60 ns VDD=40V, VGS=10V, ID=120A, RG=3.5W 3
Fall time tf 50 ns VDD=40V, VGS=10V, ID=120A, RG=3.5W 3

CAD (KiCad official)

  • Symbol: IPP120N08S403AKSA1
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220-3 (KiCad packages3D, STEP)
  • 3D model files: ipp120n08s403aksa1-etched.step / ipp120n08s403aksa1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipp120n08s403aksa1.step / ipp120n08s403aksa1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 d7208ea703fe9f84, retrieved 2026-11-02, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF