# IPP082N10NF2S

**Infineon Technologies** · MOSFETs · TO-220-3

IPP082N10NF2S from Infineon Technologies, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Gate | input | Gate pin of the N-channel MOSFET, with VGS rated -20 V to 20 V and threshold voltage 2.2 V min to 3.8 V max at ID=46 µA. |
| 2 | Drain | passive | Drain pin (also connected to the tab) with VDS of 100 V and continuous drain current up to 77 A at TC=25°C. |
| 3 | Source | passive | Source pin of the N-channel MOSFET, with continuous diode forward current up to 75 A at TC=25°C. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | TO-220-3 |
| Category | Triode/MOS Tube/Transistor |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | V(BR)DSS | 100 |  |  | V | VGS=0V, ID=1mA | 4 |
| Gate threshold voltage | VGS(th) | 2.2 | 3 | 3.8 | V | VDS=VGS, ID=46µA | 4 |
| Zero gate voltage drain current | IDSS |  | 0.1 | 1 | µA | VDS=100V, VGS=0V, Tj=25°C | 4 |
| Zero gate voltage drain current | IDSS |  | 10 | 100 | µA | VDS=100V, VGS=0V, Tj=125°C | 4 |
| Gate-source leakage current | IGSS |  | 10 | 100 | nA | VGS=20V, VDS=0V | 4 |
| Drain-source on-state resistance | RDS(on) |  | 7.3 | 8.2 | mΩ | VGS=10V, ID=50A | 4 |
| Drain-source on-state resistance | RDS(on) |  | 9 | 10.3 | mΩ | VGS=6V, ID=25A | 4 |
| Transconductance | gfs | 40 |  |  | S | /VDS/≥2/ID/RDS(on)max, ID=50A | 4 |
| Gate charge total | Qg |  | 28 | 42 | nC | VDD=50V, ID=50A, VGS=0 to 10V | 4 |
| Diode continuous forward current | IS |  |  | 75 | A | TC=25°C | 5 |
| Diode pulse current | IS,pulse |  |  | 308 | A | TC=25°C | 5 |
| Diode forward voltage | VSD |  | 0.93 | 1.2 | V | VGS=0V, IF=50A, Tj=25°C | 5 |
| Continuous drain current | ID |  |  | 77 | A | VGS=10V, TC=25°C | 3 |
| Continuous drain current | ID |  |  | 55 | A | VGS=10V, TC=100°C | 3 |
| Continuous drain current | ID |  |  | 49 | A | VGS=6V, TC=100°C | 3 |
| Continuous drain current | ID |  |  | 15 | A | VGS=10V, TA=25°C, RthJA=40°C/W | 3 |
| Pulsed drain current | ID,pulse |  |  | 308 | A | TA=25°C | 3 |
| Avalanche energy, single pulse | EAS |  |  | 47 | mJ | ID=68A, RGS=25Ω | 3 |
| Gate source voltage | VGS | -20 |  | 20 | V |  | 3 |
| Power dissipation | Ptot |  |  | 100 | W | TC=25°C | 3 |
| Power dissipation | Ptot |  |  | 3.8 | W | TA=25°C, RthJA=40°C/W | 3 |
| Operating and storage temperature | Tj,Tstg | -55 |  | 175 | °C |  | 3 |
| Thermal resistance, junction - case | RthJC |  |  | 1.5 | °C/W |  | 3 |
| Thermal resistance, junction - ambient, 6 cm² cooling area | RthJA |  |  | 40 | °C/W | 6 cm² cooling area | 3 |
| Thermal resistance, junction - ambient, minimal footprint | RthJA |  |  | 62 | °C/W | minimal footprint | 3 |
| Gate resistance | RG |  | 1.1 |  | Ω |  | 4 |
| Input capacitance | Ciss |  | 2000 |  | pF | VGS=0V, VDS=50V, f=1MHz | 4 |
| Output capacitance | Coss |  | 320 |  | pF | VGS=0V, VDS=50V, f=1MHz | 4 |
| Reverse transfer capacitance | Crss |  | 15 |  | pF | VGS=0V, VDS=50V, f=1MHz | 4 |
| Turn-on delay time | td(on) |  | 11 |  | ns | VDD=50V, VGS=10V, ID=50A, RG,ext=1.6Ω | 4 |
| Rise time | tr |  | 20 |  | ns | VDD=50V, VGS=10V, ID=50A, RG,ext=1.6Ω | 4 |
| Turn-off delay time | td(off) |  | 16 |  | ns | VDD=50V, VGS=10V, ID=50A, RG,ext=1.6Ω | 4 |
| Fall time | tf |  | 4.7 |  | ns | VDD=50V, VGS=10V, ID=50A, RG,ext=1.6Ω | 4 |
| Gate to source charge | Qgs |  | 9.8 |  | nC | VDD=50V, ID=50A, VGS=0 to 10V | 4 |
| Gate charge at threshold | Qg(th) |  | 6 |  | nC | VDD=50V, ID=50A, VGS=0 to 10V | 4 |
| Gate to drain charge | Qgd |  | 6.1 |  | nC | VDD=50V, ID=50A, VGS=0 to 10V | 4 |
| Switching charge | Qsw |  | 10 |  | nC | VDD=50V, ID=50A, VGS=0 to 10V | 4 |
| Gate plateau voltage | Vplateau |  | 4.9 |  | V | VDD=50V, ID=50A, VGS=0 to 10V | 4 |
| Output charge | Qoss |  | 38 |  | nC | VDS=50V, VGS=0V | 4 |
| Reverse recovery time | trr |  | 33 |  | ns | VR=50V, IF=50A, diF/dt=500A/µs | 5 |
| Reverse recovery charge | Qrr |  | 199 |  | nC | VR=50V, IF=50A, diF/dt=500A/µs | 5 |

## CAD (KiCad official)

- Symbol: `IPP082N10NF2S`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220-3 (KiCad packages3D, STEP)
- 3D model files: `ipp082n10nf2s-etched.step` / `ipp082n10nf2s-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ipp082n10nf2s.step` / `ipp082n10nf2s.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](docs/ipp082n10nf2s-datasheet.pdf) (11 pp, sha256 `46a903130e245429`, retrieved 2026-10-31, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ipp082n10nf2s-datasheet.pdf)