# IPP075N15N3G

**Infineon Technologies** · MOSFETs · TO-220-3

IPP075N15N3G from Infineon Technologies, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate (pin 1) of the N-channel OptiMOS 3 MOSFET, with a maximum gate-source voltage of ±20 V and a gate threshold voltage of 2 to 4 V. |
| 2 | D | passive | Drain (pin 2, also the tab) with 150 V drain-source breakdown voltage minimum and 100 A continuous drain current at TC=25 °C. |
| 3 | S | passive | Source (pin 3) of the N-channel MOSFET, the power return for the 100 A continuous drain current. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Infineon Technologies |
| Package | TO-220-3 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `IPP075N15N3G`
- Footprint: `Package_TO_SOT_THT:TO-220-3_Vertical`
- 3D model: TO-220-3 (KiCad packages3D, STEP)
- 3D model files: `ipp075n15n3g-etched.step` / `ipp075n15n3g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ipp075n15n3g.step` / `ipp075n15n3g.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Infineon Technologies datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588889151496466432) (11 pp, sha256 `f1fb24892de845fd`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/ipp075n15n3g-datasheet.pdf)