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Contents

README

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IPP062NE7N3 G

Infineon Technologies · MOSFETs · TO-220-3

IPP062NE7N3 G from Infineon Technologies, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate pin of the N-channel OptiMOS3 MOSFET, with a maximum gate-source voltage of ±20 V.
2 D passive Drain pin of the MOSFET (VDS 75 V, continuous drain current 80 A at TC=25 °C, pulsed 320 A).
3 S passive Source pin of the MOSFET, connected to the body diode anode as shown in the symbol.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-220-3
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: IPP062NE7N3 G
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220-3 (KiCad packages3D, STEP)
  • 3D model files: ipp062ne7n3-g-etched.step / ipp062ne7n3-g-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipp062ne7n3-g.step / ipp062ne7n3-g.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (9 pp, sha256 a91c506e8a5abefe, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF