main
History Download
Ray Publish 0.1.0 4586531 17d ago

IPP023N10N5

Infineon Technologies · MOSFETs · TO-220-3

IPP023N10N5 from Infineon Technologies, in a TO-220-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate control terminal; the gate-source voltage is rated from -20 V to 20 V (Table 2, page 3).
2 Drain passive Drain terminal, electrically connected to the mounting tab; the device is rated for VDS of 100 V and continuous drain current of 120 A at TC=25°C (pages 1 and 3).
3 Source passive Source terminal; the gate-source voltage limit of -20 V to 20 V (page 3) applies between the gate and this pin.

Key specifications

Parameter Value
Manufacturer Infineon Technologies
Package TO-220-3
Category Transistors/Thyristors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Continuous drain current (TC=25°C) ID 120 A TC=25°C 3
Continuous drain current (TC=100°C) ID 120 A TC=100°C 3
Pulsed drain current ID,pulse 480 A TC=25°C 3
Avalanche energy, single pulse EAS 1166 mJ ID=100A,RGS=25Ω 3
Gate source voltage VGS -20 20 V 3
Power dissipation Ptot 375 W TC=25°C 3
Operating and storage temperature Tj,Tstg -55 175 °C IEC climatic category; DIN IEC 68-1: 55/175/56 3
Thermal resistance, junction - case RthJC 0.3 0.4 K/W 3
Thermal resistance, junction - ambient, minimal footprint RthJA 62 K/W minimal footprint 3
Thermal resistance, junction - ambient, 6 cm2 cooling area RthJA 40 K/W 6 cm2 cooling area, device on 40 mm x 40 mm x 1.5 mm FR4 PCB, vertical in still air 3
Soldering temperature, wave and reflow soldering Tsold 260 °C reflow MSL1 3
Drain-source breakdown voltage V(BR)DSS 100 V VGS=0V,ID=1mA 4
Gate threshold voltage VGS(th) 2.2 3 3.8 V VDS=VGS,ID=270µA 4
Zero gate voltage drain current (Tj=25°C) IDSS 0.1 10 µA VDS=100V,VGS=0V,Tj=25°C 4
Zero gate voltage drain current (Tj=125°C) IDSS 7 100 µA VDS=100V,VGS=0V,Tj=125°C 4
Gate-source leakage current IGSS 1 100 nA VGS=20V,VDS=0V 4
Drain-source on-state resistance (VGS=10V) RDS(on) 2 2.3 mΩ VGS=10V,ID=100A 4
Drain-source on-state resistance (VGS=6V) RDS(on) 2.3 2.8 mΩ VGS=6V,ID=50A 4
Gate resistance RG 1.3 2 Ω 4
Transconductance gfs 124 248 S /VDS/>2/ID/RDS(on)max,ID=100A 4
Input capacitance Ciss 12000 15600 pF VGS=0V,VDS=50V,f=1MHz 4
Output capacitance Coss 1810 2353 pF VGS=0V,VDS=50V,f=1MHz 4
Reverse transfer capacitance Crss 80 140 pF VGS=0V,VDS=50V,f=1MHz 4
Gate charge total Qg 168 210 nC VDD=50V,ID=100A,VGS=0to10V 4
Gate to drain charge Qgd 34 58 nC VDD=50V,ID=100A,VGS=0to10V 4
Output charge Qoss 213 283 nC VDD=50V,VGS=0V 4
Diode continuous forward current IS 120 A TC=25°C 5
Diode pulse current IS,pulse 480 A TC=25°C 5
Diode forward voltage VSD 0.9 1.2 V VGS=0V,IF=100A,Tj=25°C 5
Reverse recovery time trr 99 198 ns VR=50V,IF=IS,diF/dt=100A/µs 5
Reverse recovery charge Qrr 287 574 nC VR=50V,IF=IS,diF/dt=100A/µs 5

CAD (KiCad official)

  • Symbol: IPP023N10N5
  • Footprint: Package_TO_SOT_THT:TO-220-3_Vertical
  • 3D model: TO-220-3 (KiCad packages3D, STEP)
  • 3D model files: ipp023n10n5-etched.step / ipp023n10n5-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); ipp023n10n5.step / ipp023n10n5.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Infineon Technologies datasheet (11 pp, sha256 5756d83989a4f7a6, retrieved 2026-10-17, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF